Cypress Semiconductor CY7C1020BN Fiche technique

Parcourez en ligne ou téléchargez le pdf Fiche technique pour {nom_de_la_catégorie} Cypress Semiconductor CY7C1020BN. Cypress Semiconductor CY7C1020BN 8 pages. 32k x 16 static ram

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Features
• High speed
— t
= 12, 15 ns
AA
• CMOS for optimum speed/power
• Low active power
— 825 mW (max.)
• Low CMOS standby power (L version only)
— 2.75 mW (max.)
• Automatic power-down when deselected
• Independent control of upper and lower bits
• Available in 44-pin TSOP II and 400-mil SOJ
Logic Block Diagram
DATA IN DRIVERS
A
7
A
6
A
32K x 16
5
A
RAM Array
4
A
3
A
2
A
1
A
0
COLUMN DECODER
Cypress Semiconductor Corporation
Document #: 001-06443 Rev. **
Functional Description
The CY7C1020BN is a high-performance CMOS static RAM
organized as 32,768 words by 16 bits. This device has an
automatic power-down feature that significantly reduces
power consumption when deselected.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O
written into the location specified on the address pins (A
through A
from I/O pins (I/O
specified on the address pins (A
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O
LOW, then data from memory will appear on I/O
the truth table at the back of this data sheet for a complete
description of read and write modes.
The input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a write operation (CE
LOW, and WE LOW).
The CY7C1020BN is available in standard 44-pin TSOP Type
II and 400-mil-wide SOJ packages.
•
198 Champion Court
•
32K x 16 Static RAM
). If Byte High Enable (BHE) is LOW, then data
15
through I/O
) is written into the location
9
16
through A
0
to I/O
. If Byte High Enable (BHE) is
1
8
through I/O
1
Pin Configuration
SOJ / TSOP II
Top View
NC
1
A
2
3
A
3
2
A
4
1
A
5
0
CE
6
I/O
–I/O
I/O
1
8
1
7
I/O
8
2
I/O
–I/O
I/O
9
16
9
3
I/O
10
4
V
11
CC
V
12
SS
I/O
13
5
I/O
6
14
I/O
15
7
I/O
16
8
WE
17
A
18
15
BHE
A
19
14
WE
A
20
13
CE
A
21
12
OE
NC
22
BLE
,
San Jose
CA 95134-1709
Revised February 1, 2006
CY7C1020BN
through I/O
), is
1
8
0
).
15
to I/O
. See
9
16
) are placed in a
16
44
A
5
A
43
6
42
A
7
OE
41
40
BHE
39
BLE
38
I/O
16
37
I/O
15
36
I/O
14
35
I/O
13
34
V
SS
33
V
CC
I/O
32
12
I/O
31
11
I/O
30
10
I/O
29
9
28
NC
27
A
8
A
26
9
A
25
10
A
24
11
23
NC
•
408-943-2600
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