Cypress Semiconductor CY7C1346H Fiche technique - Page 7
Parcourez en ligne ou téléchargez le pdf Fiche technique pour {nom_de_la_catégorie} Cypress Semiconductor CY7C1346H. Cypress Semiconductor CY7C1346H 16 pages. 2-mbit (64k x 36) pipelined sync sram
[2, 3, 4, 5, 6, 7]
Truth Table
(continued)
Next Cycle
Add. Used
WRITE Cycle,
Current
Suspend Burst
WRITE Cycle,
Current
Suspend Burst
Truth Table for Read/Write
Function
Read
Read
Write Byte A – (DQ
and DQP
A
Write Byte B – (DQ
and DQP
B
Write Bytes B, A
Write Byte C – (DQ
and DQP
C
Write Bytes C, A
Write Bytes C, B
Write Bytes C, B, A
Write Byte D – (DQ
and DQP
D
Write Bytes D, A
Write Bytes D, B
Write Bytes D, B, A
Write Bytes D, C
Write Bytes D, C, A
Write Bytes D, C, B
Write All Bytes
Write All Bytes
Document #: 38-05672 Rev. *B
CE
CE
CE
ZZ
1
2
3
X
X
X
L
H
X
X
L
[2, 3]
GW
H
H
)
H
A
)
H
B
H
)
H
C
H
H
H
)
H
D
H
H
H
H
H
H
H
L
ADSP
ADSC
ADV
WRITE
H
H
H
X
H
H
BWE
BW
BW
D
H
X
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
X
X
CY7C1346H
OE
CLK
DQ
L
X
L-H
D
L
X
L-H
D
BW
BW
C
B
A
X
X
X
H
H
H
H
H
L
H
L
H
H
L
L
L
H
H
L
H
L
L
L
H
L
L
L
H
H
H
H
H
L
H
L
H
H
L
L
L
H
H
L
H
L
L
L
H
L
L
L
X
X
X
Page 7 of 16
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