Cypress Semiconductor CY7C138 Fiche technique - Page 10
Parcourez en ligne ou téléchargez le pdf Fiche technique pour {nom_de_la_catégorie} Cypress Semiconductor CY7C138. Cypress Semiconductor CY7C138 18 pages. 4k x 8/9 dual-port static ram with sem, int, busy
Imprimer la pageSwitching Waveforms
ADDRESS
R
R/W
R
DATA IN
R
ADDRESS
L
BUSY
L
DATA
OUTL
R/W
BUSY
Notes
27. I/O
= I/O
= LOW (request semaphore); CE
0R
0L
28. Semaphores are reset (available to both ports) at cycle start.
29. If t
is violated, the semaphore will definitely be obtained by one side or the other, but there is no guarantee which side will control the semaphore.
SPS
Document #: 38-06037 Rev. *D
(continued)
t
WC
MATCH
t
PS
MATCH
t
BLA
Figure 11. Write Timing with Busy Input (M/S=LOW)
t
t
WB
= CE
= HIGH
R
L
Figure 12. Busy Timing Diagram No. 1 (CE Arbitration)
t
PWE
t
SD
VALID
t
DDD
t
WDD
PWE
t
WH
CY7C138, CY7C139
t
HD
t
BHA
t
BDD
VALID
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