Cypress Semiconductor MoBL-USB CY7C68003 Fiche technique
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Features
™
The Cypress MoBL-USB
(HS) USB 2.0 ULPI Transceiver.
The TX2UL is specifically designed for mobile handset
applications by offering tiny package options and low power
consumption.
■
USB 2.0 Full Speed and High Speed Compliant Transceiver
■
Multi-Range (1.8V to 3.3V) IO Voltages
■
Fully Compliant ULPI Link Interface
■
8-bit SDR ULPI Data Path
■
UTMI+ Level 0 Support
■
Integrated Oscillator
■
Integrated PLL (13, 19.2, 24, or 26 MHz Reference)
■
Integrated USB Pull Up and Termination Resistors
■
3.0V to 5.775V VBATT Input
■
Chip Select Pin
■
Single Ended Device RESET Input
TX2UL Block Diagram
CLOCK
DATA[7:0]
RESET_N
CS_N
VBATT
(3.0 –
5.775V)
VCC
(1.8V)
13/19.2/
24/26 MHz
Cypress Semiconductor Corporation
DATA BRIEF
TX2UL is a low voltage high speed
IO
Operational
Control/
Data
DIR
Logic
STP
Registers
NXT
ULPI Wrapper
Global Control Block
Reset / Clock / Power /
Misc. Control
POR
XI
XOSC
XO
•
198 Champion Court
MoBL-USB™ TX2UL USB 2.0
■
UART Pass Through Mode
■
ESD Compliance:
❐
JESD22-A114D 8 kV Contact Human Body Model (HBM) for
DP, DM, and VSS Pins
❐
IEC61000-4-2 8 kV Contact Discharge
❐
IEC61000-4-2 15 kV Air Discharge
■
Support for Industrial Temperature Range (-40°C to 85°C)
■
Low Power Consumption for Mobile Applications:
❐
5 uA Nominal Sleep Mode
❐
30 mA Nominal Active HS Transfer
■
Small Package for Mobile Applications:
❐
2.14 x 1.76 mm 20-pin WLCSP 0.4 mm Pitch
❐
4 x 4 mm 24-pin QFN
Applications
■
Mobile Phones
■
PDAs
■
Portable Media Players (PMPs)
■
DTV Applications
■
Portable GPS Units
TX2UL
ULPI Block
mode
Tx/Rx
tracking
Core
interrupt
Block
3.3V Regulator
PLL
•
San Jose
ULPI Transceiver
DP
USB
UTMI+
FS/HS
Level0
PHY
DM
RXD
TXD
Block
1.8V
Bandgap
,
CA 95134-1709
Revised April 1, 2009
CY7C68003
•
408-943-2600