Cypress Semiconductor Rambus XDR CY24271 Fiche technique - Page 11
Parcourez en ligne ou téléchargez le pdf Fiche technique pour {nom_de_la_catégorie} Cypress Semiconductor Rambus XDR CY24271. Cypress Semiconductor Rambus XDR CY24271 13 pages. Clock generator with zero sda hold time
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CLKB
CLK
CLKB
CLK
CLKB
Document Number: 001-42414 Rev. **
Figure 4. Input and Output Waveforms
V
(t)
t
F
Figure 5. Crossing Point Voltage
CLK
Figure 6. Cycle-to-cycle Jitter
t
CYCLE,i
t
= t
- t
J
CYCLE,i
CYCLE,i+1 over 10,000 consecutive cycles
Figure 7. Cycle-to-cycle Duty-cycle Error
t
(i)
t
(i)
PW-
PW+
t
(i)
CYCLE,
t
= t
(i) - t
DC,ERR
PW-
t
R
t
CYCLE,i+1
t
(i+1)
t
(i+1)
PW-
PW+
t
(i+1)
CYCLE,
(i+1) and t
(i+1) - t
PW-
PW-
CY24272
V
H
8 0 %
2 0 %
V
L
Vx+
Vx.nom
Vx-
(i+1)
PW+
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