Cypress Semiconductor S6SAP412A Manuel d'utilisation - Page 13

Parcourez en ligne ou téléchargez le pdf Manuel d'utilisation pour {nom_de_la_catégorie} Cypress Semiconductor S6SAP412A. Cypress Semiconductor S6SAP412A 18 pages. 2ch buck + 1ch buck/boost dc/dc
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6. Circuit Schematic

S6SAP412A 2ch Buck + 1ch Buck/Boost DC/DC Evaluation Board Operation Guide, Doc. No. 002-08676 Rev. *A
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Figure 6-1. Circuit schematic for power block
VIN
M1
Vi1
Vi2
GND1
GND2
GND3
IN1
PVCC1A/PVCC1
24
LX1A/LX1
PGND1A/PGND1
PG1
ADDSEL/IN4
PVCC1B/PVCC4
ADDS
17
LX1B/LX4
PGND1B/PGND4
IN2
PVCC2
8
LX2
PGND2
PG2
MB39C032_033
IN3/PG4
PVCC3
31
LX3_1
VO3
DVCC
DVCC
DVCC
LX3_2
16
SCL
SCL
PGND3
SCL
14
SDA
SDA
SDA
15
PG3
CTL1
CTL1
9
CTL2
CTL2
AVCC
10
CTL3
CTL3
CTLMAIN
11
MODE
MODE/CTL4
VREF18
12
VIN
23
L1
22
1mH
21
VIN
R5
28
PG1
100kΩ
18
L4
1mH
Vo1
19
20
VIN
5
Vo2
6
L2
1mH
7
VIN
R6
100kΩ
29
PG2
VIN
4
3
L3
1mH
VIN
1
Vo3
GND1
32
JP1
2
VBUS
3
USBVCC
DVCC
4
1
I2CVCC
SCL
5
SCL
SDA
6
SDA
2
7
P10
VIN
8
R7
GND2
9
100kΩ
30
P11
10
GND3
PG3
11
P12
12
GND4
VIN
13
R1
P13
14
27
GND5
15
P14
16
CTLM
P15
25
17
GND6
18
P21
19
26
P22
20
P23
CN1
13