CEL MeshConnect ZICM0868P0-1C-SN Lembar Data Awal - Halaman 8

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Halaman Cetak
PIN SIGNALS I/O PORT CONFIGURATION
MeshConnect module has 56 edge I/O interfaces for connection to the user's host board.
shows the layout of the 56 edge castellations.
MeshConnect I/O PIN ASSIGNMENTS
Number
Name
1
GND
2
GND
3
GND
4
GND
5
GND
6
GND
7
GND
8
NC
9
ANTA
Available: Not used for any module functionality
10
GPIO0
Available: Not used for any module functionality
11
GPIO2
Available: Not used for any module functionality
12
P0.7/IREF Must be connected to SDN for SNAP firmware
P0.6/
13
CNVSTR
Used as Chip Select for Memory on CEL Eval. Board
14
P0.5/RXD UART TXD
15
P0.4/TXD UART RXD
16
WP
Write Protect Pin of Memory Chip on Module
17
NC
18
GND
19
GND
20
NC
21
NC
22
NC
23
P0.3
Used as Chip Select for Memory IC on the CEL Module
24
P0.2
Memory IC MISO signal pin
25
P0.1
Must be connected to NIRQ for SNAP firmware
26
P0.0
Memory IC Clock Signal
27
GND
28
VCC
29
RST/C2CK Debug Clock
30
P2.7/C2D Debug Data
31
P2.6
GPIO connected to Buzzer on CEL Eval Board
32
P2.5
GPIO connected to Switch 3 on CEL Eval board
33
P2.4
GPIO connected to LED3 on CEL Eval board
34
P2.3
GPIO connected to Switch 2 on CEL Eval Board
MeshConnect™ Sub-G Module Series
The MeshConnect Module Dimensions
Notes
Page 8