Motorola GM950 Manual - Halaman 10

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Theory of Operation

3.5

Microprocessor Circuit

The control head uses the Motorola 68HC11E9 or 68HC11E20 (dependent on the used character

set) microprocessor (µP) (U0901) to control the LEDs, the LCD and to communicate with the host

radio. RAM and ROM are contained within the microprocessor itself.

The clock generator for the microprocessor can use two different conﬁgurations:

1. The oscillator inside the microprocessor (U0901) along with a 4 MHz ceramic resonator (Y0922)

and R0920 generate the clock.

2. The oscillator inside the microprocessor (U0901) along with some external components (C0922-

C0924, L0921, R0922, Y0921) generate the 7.9488 MHz clock. Q0921 is used to alter the clock

frequency slightly under software control if there is a possibility of harmonics of this clock source

interfering with the desired radio receive frequency.

The microprocessor E9/E20 (U0101) contains internal 12 (E9) or 20 (E20) Kbytes ROM, 512 (E9) or

768 (E20) bytes SRAM and 512 bytes EEPROM.

The microprocessor's RAM is always powered to maintain parameters such as the last operating

mode. This is achieved by maintaining 5V at U0901-25. Under normal conditions, when the radio is

off +5V USW is formed by FLT A+ via D0892. C0898 allows the battery voltage to be disconnected

for a couple of seconds without losing RAM parameters. Diode D0892 prevents radio circuitry from

discharging this capacitor.

There are 8 analogue to digital converter ports (A/D) on U0901. They are labelled within the device

block as PE0-PE7. These lines sense the voltage level ranging from 0 to 5V of the input line and

convert that level to a number ranging from 0 to 255 which can be read by the software to take

appropriate action.

U0901-22 is the high reference voltage for the A/D ports on the µP. Resistor R0927 and capacitor

C0925 ﬁlter the +5V reference. If this voltage is lower than +5V the A/D readings will be incorrect.

Likewise U0901-21 is the low reference for the A/D ports. This line is normally tied to ground. If this

line is not connected to ground, the A/D readings will be incorrect.

The MODB (U0901-25) input of the µP must be at a logic '1' for it to start executing correctly. The

XIRQ (U0901-45) and the IRQ (U0901-46) pins should also be at a logic '1'.

The microprocessor can determine the keypad type used, by reading the voltages at pins 63 and 64.

Connections JU0911 and JU0912 are provided by the individual keypads.

Capacitors C0927 and C0928 serve to ﬁlter out any AC noise on +5V line at U0901.

3.6

Serial Peripheral Interface (SPI)

The host radio (master) communicates to the control head µP (slave) through its SPI port (BUS).

This port consists of SPI TRANSMIT DATA (SPI MOSI) (U0901-52), SPI RECEIVE DATA (SPI

MISO) (U0901-51), SPI CLK (SPI CLCK BUF) (U0901-53) and a control head select line (CNTL HD

CE) (U0901-54). This BUS is a synchronous bus, in that the timing clock signal SPI CLCK is sent

while SPI data (SPI TRANSMIT DATA or SPI RECEIVE DATA) is sent. Therefore, whenever there is

activity on either SPI TRANSMIT DATA or SPI RECEIVE DATA there should be a uniform signal on

SPI CLK. The SPI TRANSMIT DATA is used to send serial from the host radio to the control head µP,

and SPI RECEIVE DATA is used to send data from the control head µP to the host radio.

4D.1-4

Introduction/Theory of Operation