Dimtel LLRF4.6 Manual - Halaman 4

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Power Supplies

FPGA 1.2 V core supply has been reconﬁgured on LLRF4.6. The new switching regulator

is based on the LTC3604 from Linear Technologies. Here is a comparison of the new device

with the MAX1820X used on LLRF4.2:

Output current

Switching frequency

External sync

Sync frequency

The FPGA user I/O pin labeled "SYNC" in the UCF provides the optional synchronization

function. Existing designs that used this feature based on the MAX1820X will need to be

adapted to the diﬀerent characteristics of the new regulator chip.

One major problem with the MAX1820X was that changes in external sync drive cre-

ated large output voltage transients, locking up the FPGA (high power dissipation, no

JTAG/USB response). For those reasons, few designs made use of the synchronization

capability. With a synchronization PLL, LTC3604 can seamlessly go from free running

to synchronized mode and back to free running. Direct synchronization drive (without

divide-by-13 as in the MAX1820X) provides for more a ﬂexible FPGA divide ratio.

Another power supply related change in LLRF4.6 is the deletion of 8 power output jumpers.

These made sense early on, but not at serial numbers above 100. Jumpers have been

replaced by zero ohm 0603 parts, so the regulators can still be disconnected from the

loads, if necessary.

MAX1820X

LTC3604

0.6

2 (up to 4)

Direct

10–16 (÷13)

Units

2.5

MHz

PLL

0.8–4

MHz