Yamaha htr-5890 Panduan Servis - Halaman 40
Jelajahi secara online atau unduh pdf Panduan Servis untuk Penerima Yamaha htr-5890. Yamaha htr-5890 41 halaman.
- 1. Table of Contents
- 2. Service Manual
- 3. Important Notice
- 4. To Service Personnel
- 5. Front Panel
- 6. Remote Control Panel
- 7. Rear Panels
- 8. Specifications
- 9. Internal View
- 10. Disassembly Procedures
- 11. Updating Firmware
- 12. Self Diagnosis Function (Diag)
- 13. Amp Adjustment
- 14. Display Data
- 15. IC Data
- 16. Remote Control
HTR-5890
IC520 : M30805SGP (FUNCTION P.C.B)
16bit µ-COM (Main CPU)
P10/D8
109
P07/D7
110
P06/D6
111
P05/D5
112
P04/D4
113
P114
114
P113
115
P112
116
P111
117
P110
118
P03/D3
119
P02/D2
120
P01/D1
121
P00/D0
122
P157
123
P156
124
P155
125
M30805SGP
P154
126
P153
127
P152
128
P151
129
Vss
130
P150
131
Vcc
132
P107/AN7/KI3
133
P106/AN6/KI2
134
P105/AN5/KI1
135
P104/AN4/KI0
136
P103/AN3
137
P102/AN2
138
P101/AN1
139
Avss
140
P100/AN0
141
Vref
142
Avcc
143
P97/Adtrg/RxD4/SCL4/STxD4
144
8
I/O Port
Port P0
Internal Peripheral Functions
Timer
Timer TA0 (16 bits)
Timer TA1 (16 bits)
Timer TA2 (16 bits)
Timer TA3 (16 bits)
Timer TA4 (16 bits)
Timer TB0 (16 bits)
Timer TB1 (16 bits)
Timer TB2 (16 bits)
Timer TB3 (16 bits)
Timer TB4 (16 bits)
Timer TB5 (16 bits)
Watchdog Timer
(15 bits)
D-A Converter
(8 bits x 2 channels)
40
72
P44/CS3/A20
71
P45/CS2/A21
70
P46/CS1/A22
69
P47/CS0/A23
68
P125
67
P126
66
P127
65
P50/WRL/WR/CASL
64
P51/WRH/BHE/CASH
63
P52/RD/DW
62
P53/BCLK/ALE/CLKout
61
P130
60
P131
59
Vcc
58
P132
57
Vss
56
P133
55
P54/HLDA/ALE
54
P55/HOLD
53
P56/ALE/RAS
52
P57/RDY
51
P134
50
P135
49
P136
48
P137
47
P60/CTS0/RTS0
46
P61/CLK0
45
P62/RXD0
44
P63/TXD0
43
P64/CTS1/RTS1/CTS0/CLKS1
42
P65/CLK1
41
Vss
40
P66/RXD1
39
Vcc
38
P67/TXD1
37
P70/TXD2/SDA/TA0out
8
8
8
8
8
8
Port P1
Port P2
Port P3
Port P4
Port P5
Port P6
A-D Converter (10 bits x 8 channels,
System Clock Generator
Expendable up to 10 channels)
X
IN
- X
OUT
X
CIN
- X
COUT
UART/ Clock Synchronous
SI/O (8 bits x 5 channels)
Memory
X-Y Converter
(16 bits x 16 bits)
RAM
24K
CRC arithmetic Circuit (CCITT)
(Polynomial: X16+X12+X5+1)
M16C/80 Series 16-bit CPU core
Registers
DRAM
FLG
Controller
R0H
R0L
R0H
R0L
INTB
R1H
R1L
R1H
R1L
ISP
R2
DRAM
R2
USP
Controller
R3
R3
PC
SVP
A0
VCT
Multiplier
A1
SVF
SVP
FB
SVP
VCT
SB
VCT
Port P15
Port P14
Port P13
Port P12
Port P11
8
7
8
8
5
IC520 : M30805SGP (FUNCTION P.C.B)
16bit µ-COM (Main CPU)
Pin Pin function
Function Name
Detail of function
1
P96/ANEX1/TxD4/SDA4/SRxD4
TxD4
TXDR
232C TX data / YDC TX data
2
P95/ANEX0/CLK4
CLK4
RTS
232C RTS / YDC clock
3
P94/DA1/TB4in/CTS4/RTS4/SS4
P94
CTS
232C CTS
4
P93/DA0/TB3in/CTS3/RTS3/SS3
DA0
FAN
Fan control
5
P92/TB2in/TxD3/SDA3/SRxD3
TxD3
SDTN
None audio TX data
6
P91/TB1in/RxD3/SCL3/STxD3
RxD3
RXRDS
RDS RX data / Freq data (R ver)
7
P90/TB0in/CLK3
CLK3
SCKN
None audio serial clock
8
P146
P146
CEB
BU2092 CE / ZONE2 function
9
P145
P145
CES
OSD CE / NTSC ? PAL format
10
P144
P144
RDSE
RDS CE / RDS function
11
P143
P143
CEF
FL CE / Model detect 0
12
P142
P142
/FLR
FL IC reset / Model detect 1
13
P141
P141
RDTP
PLL IC RX data
14
P140
P140
SDTP
PLL IC TX data / Tuner exist
15
BYTE
BYTE
BYTE
16bit data bus: VSS
16
CNVss
CNVss
CNVss
Processor mode choice
17
P87/Xcin
P87
BT232C
232C boot signal / 6ch input key
18
P86/Xcout
P86
BTYDC
YDC boot signal (Flash ROM write)
19
RESET
RESET
/RES
Reset
20
Xout
Xout
XOUT
Clock out
21
Vss
Vss
VSS
Ground
22
Xin
Xin
XIN
Clock in
23
Vcc
Vcc
VCC
+5V
24
P85/NMI
NMI
NMI
Un-use (VCC with R)
25
P84/INT2
INT2
REM1
Remote controller pulse
26
P83/INT1
INT1
PSW
Power SW
27
P82/INT0
INT0
PDET
Power detect
28
P81/TA4in/U
TA4in
VSY
Vertical sync pulse
29
P80/TA4out/U
P80
/ICY
IC YSS IC
30
P77/TA3in
TA3in
RXDR
232C RX data
31
P76/TA3out
P76
DMT
Digital full mute
32
P75/TA2in/W
TA2in
INTDSP
DIR, TI (DA601) interrupt
33
P74/TA2out/W
P74
VBIT
Digital full mute rear L/R
34
P73/CTS2/RTS2/TA1in/V
CTS2
CEP
PLL IC CE / Tuner step 1
35
P72/CLK2/TA1out/V
P72
SCKP
PLL IC clock / Tuner step 0
36
P71/RxD2/SCL2/TA0in/TB5in
SCL2
SCL
IIC bus clock
37
P70/TxD2/SDA2/TA0out
SDA
SDA
IIC bus data
38
P67/TxD1
TxD1
SDM
DIR, TI (DA601), YSS930, DAC TX
39
Vcc
Vcc
VCC
+5V
40
P66/RxD1
RxD1
SDD
DIR, TI (DA601), YSS930, DAC RX
41
Vss
Vss
VSS
Ground
42
P65/CLK1
CLK1
SCK
DIR, TI (DA601), YSS930, DAC clock
43
P64/CTS1/RTS1/CTS0/CLKS1
P64
/CSY
YSS930 CE
44
P63/TxD0
TxD0
DTEV
E-Volume TX data
45
P62/RxD0
P62
CEEV
E-Volume CE
46
P61/CLK0
CLK0
CKEV
E-Volume clock
47
P60/CTS0/RTS0
P60
/CSTI
TI (DA601) CE
48
P137
P137
/CSDIR
DIR CE
49
P136
P136
INTFCT
Interrupt factor DIR or TI (DA601)
50
P135
P135
/RCLK
Recout SW control (ROHM) clock
51
P134
P134
/RTXD
Recout SW control (ROHM) data
52
P57/RDY
RDY
/RDY
+5V fix
53
P56/ALE/RAS
ALE
ALE
Open
54
P55/HOLD
HOLD
/HOLD
+5V fix
55
P54/HLDA/ALE
HLDA
HLDA
Open
56
P133
P133
/CSDAC
DAC CE
57
Vss
Vss
VSS
Ground
58
P132
P132
/MIC
Mic detect
59
Vcc
Vcc
VCC
+5V
60
P131
P131
SPIRDY
TI (DA601) Serial Ready
61
P130
P130
/ICD
IC DIR IC
I/O
On
Off
Backup
SO
O
OL
OL
SCK
I/O
OL
OL
I
I
I
OL
DA-O
I
I
OL
SO
SO
OL
OL
SI
SI
I
OL
SCK
SCK
OL
OL
O / I
O
OL
OL
O / I
O
OL
OL
O / I
O
OL
OL
O / I
O
OL
OL
O / I
O
OL
OL
I
I
I
OL
O / I
O
OL
OL
VSS
VSS VSS
VSS
VCC
VCC VCC
VCC
I (PU)
I
I
OL
I
I
I
OL
I
-
-
-
OPEN
-
-
-
VSS
VSS VSS
VSS
12MHz
-
-
-
VCC
VCC VCC
VCC
VCC
VCC VCC
VCC
INT (LoEdge)
I
I
OL
INT (HiEdge)
I
I
OL
INT (LoEdge)
I
I
I
Lo Edge
I
I
OL
O
O
OL
OL
Double Edge
I
I
OL
O
O
OL
OL
INT (LoEdge)
I
I
OL
I
I
I
OL
I / O
O
OL
OL
I / O
O
OL
OL
I / O
I/O
OL
OL
I / O
I/O
OL
OL
SO
SO
OL
OL
VCC
VCC VCC
VCC
SI
SI
I
OL
VSS
VSS VSS
VSS
SCK
SCK
OL
OL
O
O
OL
OL
SO
SO
OL
OL
O
O
OL
OL
SCK
SCK
OL
OL
O
O
OL
OL
O
O
OL
OL
I
I
I
OL
O
O
OL
OL
O
O
OL
OL
VCC
VCC VCC
VCC
OPEN
OPEN OPEN OPEN
VCC
VCC VCC
VCC
OPEN
OPEN OPEN OPEN
O
O
OL
OL
VSS
VSS VSS
VSS
I
I
I
OL
VCC
VCC VCC
VCC
I
I
I
OL
O
O
OL
OL