Cypress Semiconductor CY7C1333H Lembar Spesifikasi - Halaman 9

Jelajahi secara online atau unduh pdf Lembar Spesifikasi untuk Perangkat Keras Komputer Cypress Semiconductor CY7C1333H. Cypress Semiconductor CY7C1333H 13 halaman. Cypress 2-mbit (64k x 32) flow-through sram with nobl architecture specification sheet

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Switching Characteristics

Parameter
Hold Times
t
Address Hold after CLK Rise
AH
t
ADV/LD Hold after CLK Rise
ALH
t
WE, BW
WEH
t
CEN Hold after CLK Rise
CENH
t
Data Input Hold after CLK Rise
DH
t
Chip Enable Hold after CLK Rise
CEH

Switching Waveforms

[18, 19, 20]
Read/Write Waveforms
1
CLK
t CENS
t CENH
CEN
t CES
t CEH
CE
ADV/LD
WE
BW
[A:D]
A1
ADDRESS
t AS
t AH
DQ
OE
COMMAND
WRITE
D(A1)
Notes:
18. For this waveform ZZ is tied LOW.
19. When CE is LOW, CE
is LOW, CE
1
20. Order of the Burst sequence is determined by the status of the MODE (0 = Linear, 1 = Interleaved). Burst operations are optional.
Document #: 001-00209 Rev. **
PRELIMINARY
Over the Operating Range (continued)
Description
Hold after CLK Rise
[A:D]
2
3
4
t CYC
t CH
t CL
A2
A3
t CDV
t CLZ
D(A1)
D(A2)
D(A2+1)
t DS
t DH
WRITE
BURST
READ
D(A2)
WRITE
Q(A3)
D(A2+1)
DON'T CARE
is HIGH and CE
is LOW. When CE is HIGH, CE
2
3
[12, 13]
133 MHz
Min.
0.5
0.5
0.5
0.5
0.5
0.5
5
6
7
A4
A5
t DOH
t OEV
t CHZ
Q(A4+1)
Q(A3)
Q(A4)
t OEHZ
t DOH
t OELZ
READ
BURST
WRITE
Q(A4)
READ
D(A5)
Q(A6)
Q(A4+1)
UNDEFINED
is HIGH or CE
is LOW or CE
1
2
CY7C1333H
100 MHz
Max.
Min.
Max.
0.5
0.5
0.5
0.5
0.5
0.5
8
9
10
A6
A7
D(A5)
Q(A6)
D(A7)
READ
WRITE
DESELECT
D(A7)
is HIGH.
3
Page 9 of 12
Unit
ns
ns
ns
ns
ns
ns
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