4DSP AD484 Manuale d'uso - Pagina 8

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AD484 user manual
3.1.1.6
Pn4 user I/O connector
The Pn4 connector is wired to the Virtex-4 device A. The 32 lower bits are available only if an
XC4VFX60 device is mounted on board. The 32 higher bits are available only if PCI 32-bit is
used and only if specified at the time of order.
All signals are user-defined 3.3V LVTLL./LVCMOS.
Connector
Signal
pin
name
1
Pn4_IO0
3
Pn4_IO2
5
Pn4_IO4
7
Pn4_IO6
9
Pn4_IO8
11
Pn4_IO10
13
Pn4_IO12
15
Pn4_IO14
17
Pn4_IO16
19
Pn4_IO18
21
Pn4_IO20
23
Pn4_IO22
25
Pn4_IO24
27
Pn4_IO26
29
Pn4_IO28
31
Pn4_IO30
33
Pn4_IO32
35
Pn4_IO34
37
Pn4_IO36
39
Pn4_IO38
41
Pn4_IO40
43
Pn4_IO42
45
Pn4_IO44
47
Pn4_IO46
49
Pn4_IO48
51
Pn4_IO50
53
Pn4_IO52
55
Pn4_IO54
57
Pn4_IO56
59
Pn4_IO58
61
Pn4_IO60
63
Pn4_IO62
Table 2 : Pn4 pin assignment
February 2007
FPGA
FPGA
pin
pin
M9
M10
N11
M11
N7
N8
N6
P6
P10
P11
P9
N9
R8
P8
R6
R7
N21
M21
M20
M19
P19
N19
N18
N17
P16
N16
R18
P18
P21
P20
R17
R16
L9
M5
L5
AD11
AD10
L4
L3
AB11
AC11
M4
N4
T9
T8
P5
R5
AA10
AB10
P4
R3
W10
Y10
N3
P3
U6
U5
T4
T3
U7
V6
U4
V4
U9
AD484 User manual
www.4dsp.com
Signal
Connector
name
pin
Pn4_IO1
2
Pn4_IO3
4
Pn4_IO5
6
Pn4_IO7
8
Pn4_IO9
10
Pn4_IO11
12
Pn4_IO13
14
Pn4_IO15
16
Pn4_IO17
18
Pn4_IO19
20
Pn4_IO21
22
Pn4_IO23
24
Pn4_IO25
26
Pn4_IO27
28
Pn4_IO29
30
Pn4_IO31
32
Pn4_IO33
34
Pn4_IO35
36
Pn4_IO37
38
Pn4_IO39
40
Pn4_IO41
42
Pn4_IO43
44
Pn4_IO45
46
Pn4_IO47
48
Pn4_IO49
50
Pn4_IO51
52
Pn4_IO53
54
Pn4_IO55
56
Pn4_IO57
58
Pn4_IO59
60
Pn4_IO61
62
Pn4_IO63
64
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