Garmin GNC 250 Manuale di manutenzione e riparazione - Pagina 9
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1.2.2 CPU Board Assembly
The CPU Board Assembly contains the CPU, operating system ROM, system memory, discrete I/O,
serial communication drivers/receivers and the power supply. These items are discussed in further
detail below.
1.2.2.1 Central Processing Unit (CPU)
The CPU board is a microprocessor-based computer board. This board contains an Intel 80L186EB
microprocessor running at 16 MHz, a reprogrammable memory chip and random access memory
chips (RAM). Data stored in RAM is maintained by a 3 volt lithium battery when the unit is switched
off, and by the regulated 5 volt supply when the unit is powered on. A custom LSI is used to decode
the signals from the GPS satellites. A real time clock IC is used to keep track of the date and time.
Other circuits on the board are used for input/output functions such as controlling the display,
reading the keypad, and controlling the receiver. Discrete input/output lines are provided for CDI
course deviation, CDI to/from flag, CDI VAN flag, Super Flag, external annunciators, OBS course
(GNC 300 only) and to activate the Approach mode (GNC 300 only). Serial communication lines for
OBI (clock/data/sync), ARINC 429, RS-422 (GNC 300 only) and RS-232 (two channels) are also
included.
1.2.2.2 Power Supply Circuits
The power supply section of the CPU board outputs +60 and +40 volts for the display drivers, ± 12
volts, +15 volts and +5 volts (VCC). In addition, the CPU board contains comparator circuits for
detecting low Ni-Cad battery level, low memory battery voltage, and external power.
The external power input is through the rear connector (J1) and from the AC adapter through a DC
power jack located near the rear connector. External battery pack power is also applied to the rear
connector (J1). All of these sources are diode isolated to prevent parallel sourcing. The unit is
turned on and off by a digital latch circuit operated by a knob located on the front panel adjacent to
the NavData® card opening. The switching circuit is a fly-back design. The switching regulator
operates at a frequency of approximately 129 kHz and uses a high efficiency switching regulator for
the switching device. The high efficiency switching regulator drives a transformer that is configured
in a fly-back mode. The +15 volt output is post-regulated to provide 11.75 to 12.25 volts. The +5
volt output is regulated at 4.8 to 5.2 volts. All other voltages are +/-20%.
1.2.3 GPS Receiver
The RF/IF assembly consists of a dual conversion receiver, a frequency synthesizer, and a high
precision crystal oscillator. The receiver consists of a ceramic RF filter, RF and IF amplifiers, mixers,
and an IF filter. The frequency synthesizer uses the high precision oscillator as a reference
frequency for the phase detector in the synthesizer. The resultant frequency is used in the mixer
section to produce the first IF. After further amplification and mixing with a product of the crystal
oscillator, the baseband IF is passed to the CPU Board for processing.
The crystal output is also used for the system clock pulse. The RF/IF assembly is contained within a
shielding fence/cover and connection to the antenna is made via a BNC connector. The RF/IF
supplies +5 volts to the antenna's preamplifier through this BNC connector.
The block diagram in Figure 4 shows the interaction between components on the RF/IF Assembly.
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