Fujitsu SK-8FX-TSC-32PMC Manuale d'uso - Pagina 22
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SK-8FX-TSC-32PMC User Guide
Chapter 5 Basic TSC Tuning Process
5 Basic TSC Tuning Process
Following some basic rules during the tuning process of an FMA1125 touch application can
help to get the application running quickly. An example program is pre-programmed on the
SK-8FX-TSC-32PMC, which enables easy parameter tuning using a sort of command-line
interface to a host PC running a standard terminal program (8N1, 115200 baud).
Type 'help' followed by <ENTER> for a list of available commands.
Note:
Please keep in mind that the tuning firmware shows the Impedance and Reference
Impedance values as '127-Register Value' in order to have a more intuitive behaviour
(a touched key then gives a higher impedance value than an untouched one).
5.1 Reference Delay
The first Parameter to adjust is the Reference Delay. This parameter is used to globally
compensate parasitic capacitance present on all tracks. It can be set in the example
Firmware using the 'srd' command, followed by a blank the desired value. The influence on
the Impedance and Reference Impedance values can be seen below:
RefDelay = 50
RefDelay = 0
RefDelay = max.
(Too low for this layout,
(Too high for this layout,
(ideal for this layout)
inputs are saturated)
inputs are too small)
The average value of the Impedance and Reference registers should be around the middle
of the scale, and a reserve of about 20-30 counts should be kept to zero and full-scale in
order to enable correct AIC (Automatic Impedance Calibration) operation.
In case the difference between biggest and smallest values is too big (some values close to
zero, others close to max.), tuning capacitors can be used to roughly match the
capacitances. Every count of the Impedance Register corresponds to a value of 0.078pF
(default settings of FMA1125) on the input pin, so that e.g. attaching a 4.7pF capacitor
between GND and the input pin with the smallest value will increase the bar by about 60
counts.
In case some values are close to the maximum even though Reference Delay is already set
to the maximum value (127), an additional capacitor can be connected to the PAREF pin.
FMEMCU-UG-90003-10
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