Chrontel CH7034B Note applicative - Pagina 2

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CHRONTEL
Table 1: Power Supply Pins Assignment of the CH7034B (QFN)
Pin Assignment #Of Pins Type
30,41
2
10,42
2
23,46
2
73, 77
2
71
1
53,61
2
9,60
2
33,38
2
83
1
45
1
22,47
2
75, 79
2
70
1
52,62
2
59,11
2
VCC3_3
47R 100MHz
L1
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
1
2
C1
10uF
0.1uF
47R 100MHz
L2
VDDM Q
1
2
C7
10uF
0.1uF
47R 100MHz
L3
AVDD_DAC
1
2
C13
10uF
0.1uF
47R 100MHz
L4
VDDIO
VDDIO
1
2
Note: All the Ferrite Beads described in this document are recommended to have an impedance of less than 0.05
Ω
Ω
23
at 25MHz & 47
used for the diagram.
2.1.3
On chip power-on reset function's sequence
Power-on reset sequence shown in the Figure 2, should be refer to for design target of generating the ResetB signal
to CH7034B by onboard RC delay. Otherwise, the Power-on Reset Function maybe not work, and the Registers can
NOT be reset to the default values. For hard ware circuit, please refer to 2.3 RESETB.
2
Symbol
Power
VDDH
Power
DVDD
Power
AVDD
Power
AVDD_DAC
Power
AVDD_PLL
Power
VDDMQ
Power
VDDMS
Ground
VSSH
Power
VDDIO
Ground
DGND
Ground
AGND
Ground
AGND_DAC
Ground
AGND_PLL
Ground
GNDMQ
Ground
GNDMS
U1
30,41
VDDH
C2
C3
33,38
0.1uF
VSSH
53,61
VDDM Q
C8
C9
0.1uF
52,62
CH7034
GNDM Q
73, 77
AVDD_DAC
C14
C15
0.1uF
75, 79
AGND_DAC
83
VDDIO
C19
C20
10uF
0.1uF
22,47
AGND
Figure 1: Power Supply Decoupling and Distribution
at 100MHz. Please refer to Fair Rite part #2743019447 for details or an equivalent part can be
Description
LVDS Power Supply (3.3V)
Digital Power Supply (1.8V)
Analog Power Supply (3.3V)
DAC Power Supply (3.3V)
PLL Power Supply (1.8V)
SDRAM output buffer power supply (3.3V)
SDRAM device power supply (3.3V)
LVDS ground
IO power supply (1.8-3.3V)
Digital ground
Analog ground
DAC ground
PLL ground
SDRAM output buffer ground
SDRAM ground
9,60
VDDM S
C4
11,59
0.1uF
GNDM S
23,46
AVDD
C10
22,47
0.1uF
AGND
QFN
10,42
DVDD
C16
45
0.1uF
DGND
71
AVDD_PLL
C21
70
0.1uF
AGND_PLL
206-1000-013
AN-B013
VCC3_3
47R 100MHz
L5
VDDM S
1
2
C6
C5
0.1uF
10uF
47R 100MHz
L6
AVDD
1
2
C12
C11
0.1uF
10uF
VCC1_8
47R 100MHz
L7
DVDD
1
2
C18
C17
0.1uF
10uF
47R 100MHz
L8
AVDD_PLL
1
2
C22
10uF
Ω
Rev1.4,
06/30/2020