EPC EPC9024 Manuale di avvio rapido - Pagina 4
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Gate Drive Supply
Gate Drive
V
DD
Regulator
LM5113
Logic and
PWM
Gate
Dead-time
Input
Driver
Adjust
Figure 1: Block Diagram of Development Board
Figure 4: Typical Waveforms for V
= 28 V to 3.3 V/4 A (5 MHz) Buck converter
IN
CH2: (V
) Switch node voltage –– CH4: V
OUT
Half-Bridge with Bypass
V
IN
OUT
Input voltage
PWM
7 V – 12 V
–
V
Supply
DD
+
Gate Drive Supply
(Note Polarity)
+
V
V
IN
–
(For E ciency
Measurement)
PWM Input
EFFICIENT POWER CONVERSION
Figure 2: Proper Connection and Measurement Setup
Figure 3: Proper Measurement of Switch Node – OUT
A
I
IN
Switch Node
V
External Circuit
EPC
Do not use probe ground lead
Do not let
probe tip
touch the
low-side die!
Minimize loop
Place probe
tip on pad
<28 V
+
Supply
IN
–