CIRCUIT DESIGN STD-302Z Manuale operativo - Pagina 5

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Receiver part
Item
Receiver type
1st IF frequency
2nd IF frequency
Maximum input level
BER (0 error/2556 bits)
*2
BER (1 % error)
Sensitivity 12dB/ SINAD
Spurious response rejection
Adjacent CH selectivity
*4
Intermodulation
DO output level
RSSI rising time
Time until valid Data-out
Spurious radiation
RSSI
Notice
The time required until a stable DO is established may get longer due to the possible frequency drift
caused by operation environment changes, especially when switching from TX to RX, from RX to TX
and changing channels. Please make sure to optimize the timing. The recommended preamble is more
than 20 ms.
Antenna connection is designed as pin connection.
RF output power, sensitivity, spurious emission and spurious radiation levels may vary with the trace
used between the RF pin and the coaxial connection. Please make sure to verify those parameters
before use.
The feet of the shield case should be soldered to a wide GND pattern to avoid any change in
characteristics.
Notes about the specification values
BER: RF level where no error per 2556 bits is confirmed with the signal of PN9 and 4800 bps.
*1
BER (1 % error) : RF level where 1% error per 2556 bits is confirmed with the signal of PN9 and 4800 bps.
*2
Spurious response, CH selectivity: Jamming signal used in the measurement is unmodulated.
*3
Intermodulation: Ratio between the receiver input level with BER 1% and the signal level (PN9 4800 bps)
*4
added at the points of 'Receiving frequency - 200 kHz ' + ' Receiving frequency -100kHz' with which BER
1% is achieved.
Time until valid Data-out : Valid DO is determined at the point where Bit Error Rate meter starts detecting
*5
the signal of 4800bps, 1010repeated signal.
All specifications are specified based on the data measured in a shield room using the PLL setting controller
board prepared by Circuit Design.
Measuring equipment:
SG=ANRITUS communication analyzer MT8802
Spectrum analyzer = ANRITSU MS2830A
BER measure = ANRITSU MP1201G
OG_STD-302S-429M_v11e
MIN
Double superheterodyne
MHz
kHz
dBm
*1
dBm
-108
dBm
dBm
*3
dB
*3
dB
dB
V
0
ms
*5
ms
dBm
300
mV
190
TYP
MAX
Remarks
21.7
450
10
-115
PN 9 4800bps
-120
PN 9 4800bps
-120
fm1 k/ dev 2kHz CCITT
70
1 st Mix, 2 signal method, 1 % error
55
2 nd Mix, 2 signal method, 1 % error
+/- 12.5kHz,
50
2 signal method, 1 % error
50
2 signal method, 1 % error
2.8
L = GND H = 2.8 V
30
50
CH shift of 12.5 kHz (from PLL setup)
50
70
When power ON (from PLL setup)
50
100
CH shift of 12.5 kHz (from PLL setup)
70
120
When power ON (from PLL setup)
-60
-54
Conducted 50 ohm
350
400
With -97 dBm at 429.5 MHz
240
290
With -113 dBm at 429.5 MHz
Specifications are subject to change without prior notice
5
OPERATION GUIDE
Circuit Design, Inc.