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PmodCLP Reference Manual
LCD Controller
The LCD controller contains a character-generator ROM (CGROM) with 192 preset 5x8 character
patterns (see table 4 below), a character-generator RAM (CGRAM) that can hold 8 user-defined 5x8
characters, and a display data RAM (DDRAM) that can hold 80 character codes. Character codes
written into the DDRAM serve as indexes into the CGROM (or CGRAM). Writing a character code into
a particular DDRAM location will cause the associated character to appear at the corresponding
display location. Display positions can be shifted left or right by setting a bit in the instruction register
(IR). The write-only IR directs display operations (such as clear display, shift left or right, set DDRAM
address, etc). Available instructions (and the associated IR codes) are shown in the right-most column
of table 3 below. A busy flag shows whether the display has competed the last requested operation;
prior to initiating a new operation, the flag can be checked to see if the previous operation has been
completed.
The display has more DDRAM locations than can be displayed at any given time. DDRAM locations
00H to 27H map to the first display row, and locations 40H to 67H map to the second row. Normally,
DDRAM location 00H maps to the upper left display corner, and 40H to the lower left. Shifting the
display left or right can change this mapping. The display uses a temporary data register (DR) to hold
data during DDRAM /CGRAM reads or writes, and an internal address register to select the RAM
location. Address register contents, set via the IR, are automatically incremented after each read or
write operation. The LCD display uses ASCII character codes. Codes up through 7F are standard
ASCII (which includes all "normal" alphanumeric characters). Codes above 7F produce various
international characters – please see the manufacturer's data sheet for more information on
international codes.
The PmodCLP is connected to the system boards by one dual and one single Pmod connector. The
interface includes eight data and three control signals that are routed from the Pmod connectors to
the LCD controller IC via simple resistor-diode voltage translation circuits. Power (3.3V or 5V) and
GND are routed to the LCD controller, and to a 3.3V-to-5V boost regulator that produces the 5VDC
required by the LCD panel itself. The voltage translation circuit ensures the eight data signals are
returned to the system board at 3.3V (as mentioned, if 5V signals are required, the regulator at IC1
can be removed). The three LCD control signals include RS (Register Strobe) that clocks data into
registers, the R/W signal that determines bus direction, and the E signal that enables the bus for read
or write operations. Pmod connector pin definitions are shown below, and following that is a figure
showing LCD bus signals and timings.
Pin No.
Symbol
J1.5, J1.11,
Vss
J2.5
J1.6, J1.12,
Vdd
J2.6
J2.1
RS
J2.2
R/W
J2.3
E
J2.4
No Connect
J1.1,2, 3, 4
Data Bus
J1.7,8,9,10
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Table 1. PmodCLP Connector Signals
Signal ground
Power supply (5V)
Register select: high for data transfer, low for instruction register
Read/write signal: high for read mode, low for write mode
Read/write strobe: high for read OE; falling edge writes data
Optional back-light enable (not connected on PmodCLP)
Bi-directional 8-bit data bus
Signal Description
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