Digilent Cerebot II Manuale di riferimento - Pagina 7

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Cerebot II Reference Manual
Pmod Headers and SPI Connection
Note: All Pmod headers can be used as general purpose I/Os or for the following specific purposes.
Pin
Description
JA
External memory bus
These pins connect to the multiplexed Address/Data line of
the ATmega64 external memory bus interface.
JB
External memory bus
These pins connect to the higher order address pins of the
ATmega64 external memory bus interface.
JC
Serial port communications
Connection to UART0. A PmodRS232™ can be used on this
connector for an RS232 serial interface. JC shares the RXD0
and TXD0 pins with the ISP ports. No device can be
connected to JC during in-system programming.
External memory bus
Pins 7-9 connect to the control signals of the ATmega64
external memory bus interface.
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Cerebot II Pmod Header Pins to
ATmega64L Ports / Bit
Pin
Function
1
AD0
2
AD1
3
AD2
4
AD3
5
GND
6
VCC
7
AD4
8
AD5
9
AD6
10
AD7
11
GND
12
VCC
1
A8
2
A9
3
A10
4
A11
5
GND
6
VCC
7
A12
8
A13
9
A14
10
A15
11
GND
12
VCC
1
XCK0/ AIN0
2
OC3A/ AIN1
3
RXD0/ PDI
4
TXD0/ PDO
5
GND
6
VCC
7
WR
8
RD
9
ALE
10
TOSC2
11
GND
12
VCC
Digilent, Inc.
Port / Bit
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PE2
PE3
PE0
PE1
PG0
PG1
PG2
PG3
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