Cisco WS-X6516A-GBIC - Syst. CATALYST 6500 16PORT GIGE MOD White Paper - Pagina 10

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Cisco WS-X6516A-GBIC - Syst. CATALYST 6500 16PORT GIGE MOD White Paper
Figure 10. WRED
WRED is built into the port ASIC and is performed in hardware. There is no performance penalty applied when WRED is in use.
Scheduling: WRR
With multiple queues on each switch port, WRR (see Figure 11) provides a way to schedule and send data held in those queues onto the wire.
Used on the egress port, the configuration of WRR allows a weighting to be assigned to each queue, which is then used to determine the amount
of bandwidth to which each queue has access. The "round-robin" aspect of the algorithm allows each queue to be serviced in turn, sending a set
amount of data before moving onto the next queue.
Figure 11. WRR
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