Motorola GP320 Series Informazioni sul servizio - Pagina 12

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Motorola GP320 Series Informazioni sul servizio
2-2
The LDMOS PA is capable of supplying an output power of 7W with an input signal of 0.3W. The
current drain is typically 1300mA while operating in the frequency range of 403-470MHz. The power
output can be varied by changing the bias voltage.
2.2

Antenna Switch

The antenna switch circuit consists of two pin diodes (CR101 and CR102), a pi network (C107,
L104 and C106), and two current limiting resistors (R101 and R170). In the transmit mode, B+ at
PCIC (U102) pin 23 goes low turning on Q111 which applies a B+ bias to the antenna switch circuit
to bias the diodes "on". The shunt diode (CR102) shorts out the receiver port and the pi network.
This operates as a quarter wave transmission line to transform the low impedance of the shunt
diode to a high impedance at the input of the harmonic filter. In the receive mode, the diodes are
both off, creating a low attenuation path between the antenna and receiver ports.
2.3

Harmonic Filter

The harmonic filter consists of components C104, L102, C103, L101 and C102. The harmonic filter
for UHF is a modified Zolotarev design optimized for efficiency of the power module. This type of
filter has the advantage that it can give a greater attenuation in the stop-band for a given ripple level.
The harmonic filter insertion loss is typically less than 1.2dB.
2.4

Antenna Matching Network

The antenna matching network is made up of inductor L116. This component matches the antenna
impedance to the harmonic filter to optimize the performance of the transmitter and receiver.
2.5

Power Control Integrated Circuit (PCIC)

The transmitter uses PCIC, U102, to regulate the power output of the radio. The current to the final
stage of the power module is supplied through R101 to provide a voltage proportional to the current
drain. This voltage is then fedback to the Automatic Level Control (ALC) within the PCIC to regulate
the output power of the transmitter.
The PCIC contains internal digital to analog converters (DACs) that provide a programmable control
loop reference voltage through the SPI line of the PCIC.
The PCIC internal resistors, integrators, and external capacitors (C133, C134 and C135) control the
transmitter rise and fall times to reduce the power splatter into adjacent channels.
Diode CR105 and its associated components are part of a temperature cut back circuit. This circuit
senses the printed circuit board temperature around the transmitter circuits and outputs a DC
voltage to the PCIC. If the DC voltage produced exceeds the set threshold of the PCIC, the
transmitter output power decreases to reduce the transmitter temperature.
THEORY OF OPERATION