Cypress Semiconductor CY7C1350G Scheda tecnica - Pagina 15

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Document History Page
Document Title: CY7C1350G 4-Mbit (128K x 36) Pipelined SRAM with NoBL™ Architecture
Document Number: 38-05524
Issue
REV.
ECN NO.
Date
**
224380 See ECN
*A
276690 See ECN
*B
332895 See ECN
*C
351194
See ECN
*D
419264
See ECN
*E
419705
See ECN
*F
480368
See ECN
Document #: 38-05524 Rev. *F
Orig. of
Change Description of Change
RKF
New data sheet
VBL
Changed TQFP pkg to lead-free TQFP in Ordering Info section
Added comment of BG lead-free package availability
SYT
Converted from Preliminary to Final
Removed 225 MHz and 100 MHz speed grades
Address Expansion balls in the pinouts for 119 BGA Package was modified as per
JEDEC standards
Modified V
V
test conditions
OL,
OH
Replaced TBDs for Θ
table
Changed the package name for 100 TQFP from A100RA to A101
Removed comment on the availability of BG lead-free package
Updated Ordering Information by removing Shaded Parts
PCI
Updated Ordering Information Table
RXU
Converted from Preliminary to Final
Changed address of Cypress Semiconductor Corporation on Page# 1 from "3901
North First Street" to "198 Champion Court"
Modified test condition from V
Modified test condition from V
Modified "Input Load" to "Input Leakage Current except ZZ and MODE" in the
Electrical Characteristics Table
Replaced Package Name column with Package Diagram in the Ordering Information
table
Replaced Package Diagram of 51-85050 from *A to *B
Updated the Ordering Information
RXU
Added 100 MHz speed grade
VKN
Added the Maximum Rating for Supply Voltage on V
Updated the Ordering Information table.
and Θ
to their respective values on the Thermal Resistance
JA
JC
< V
to V
< V
DDQ
DD
DDQ
< V
< V
to V
IH
DD
IH
DD
CY7C1350G
DD
Relative to GND.
DDQ
Page 15 of 15
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