Cypress Semiconductor MoBL-USB CY7C68000A Scheda tecnica - Pagina 4

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Pin Configurations

The following pages illustrate the individual pin diagrams that are available in the 56-pin QFN and 56-pin VFBGA packages.
The packages offered use either an 8-bit (60 MHz) or 16-bit (30 MHz) bus interface.
TXReady
1
Suspend
2
Reset
3
AV
4
CC
XTALOUT
5
XTALIN
6
AGND
7
AV
8
CC
DPLUS
9
DMINUS
10
AGND
11
XcvrSelect
12
TermSelect
13
OpMode0
14
Document #: 38-08052 Rev. *G
Figure 1. CY7C68000A 56-pin QFN Pin Assignment
CY7C68000A
56-pin QFN
CY7C68000A
GND
42
D5
41
Reserved
40
D6
39
D7
38
D8
37
D9
36
Reserved
35
D10
34
D11
33
V
32
CC
D12
31
GND
30
D13
29
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