EG&G ORTEC 463 Manuale operativo e di servizio - Pagina 10

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Level Disc. Output

-0.7V

(Pin 8. IC1C)

Zero Crossing Signal

(Pin 8, 1C2C)

-1.5V

•0.7V

-0.7V

And Output Signal

(Pin 6, IC4B}

Fig. 5.2. Signal Shapes Illustrating Detection of the

Zero-Crossing Point of Constant Fraction Signal.

Adjust potentiometer R45, This comparison is made

by ICS. When the zero-crossing baseline goes negative

with respect to pin 2 of ICS, the comparator output

goes from its low to its high state of 'Vl V. At this time

Q9 is conducting, Q8 is off, and C7 is charged slowly

toward +24 V by current through R37. This positive

excursion is applied through Q7 to the base of Q6

to increase the current through the collector of Q6.

The increasing current causes the

of QS to increase

and provides a negative offset voltage at the pin 4 input

of IC2, This offset is amplified and inverted through IC2

for a positive excursion back to pin S of ICS that causes

ICS to change back to its low state and to thus decrease

the offset voltage at pin 4 of IC2. This negative feedback

control stabilizes the zero-crossing point against drifts

due to power supply voltage variations, slight variations

in the input dc level, or aging of components. After the

internal Walk Adjust is performed on the 46S at the

factory, no further adjustments should be required unless

components are interchanged in the instrument.

The detected zero-crossing signal at pin 6 of IC4B

triggers a monostable, IC5A and IC5B. The monostable

period is 'VlOO nsec for Ge(Li) and Scint/SB selections

of SI and is increased to 'Vl fxsec for the Nal mode

selection. The longer reset time used for the Nal mode

prevents multiple outputs on the trailing edge of the

Nal signals.

The positive-going signal at the pin 2 output of IC^B

triggers a

positive output monostable, Q12 to Q16.

This provides a positive logic signal output through CN4.

The positive signal from pin 2 of IC2B is also routed

through R49 and DL2B ('vS-nsec delay) to pin IS of

IC4C. IC4C sums this delayed positive signal with the

inverted signal from pin 8 of IC5C for a positive signal

at pin 11 of IC4C with a width equal to the delay of

DL2B of 'V8 nsec. This shaped signal is then routed

to two current switches to produce the two negative

logic signals through CN2 and CNS. Q10 and Q11

form the current switch for the output through CNS,

and Q18 and Q19 form the current switch for the output

through CN2. Each output signal is approximately 20 mA

and is intended to drive a low impedance of typically 50^2.

6. MAINTENANCE

6.1. GENERAL

The ORTEC 46S should require no regular maintenance

other than replacement of components that have failed

due to age. The three calibrations described below may

be required if internal components are replaced.

If a 46S is suspected of malfunction, disconnect it from

al l circuit interconnections and check the voltages at the

check points l isted in Table 6.1. These voltages are nominal

values and are furnished only as a guide for troubleshooting

in the instrument. The values have been measured with

the Shaping Mode switch set at Scint/SB and with the

Disc Level control fully counterclockwise at 0 dial di

visions.

6.2. LEVEL DISCRIMINATOR ZERO ADJUSTMENT

Connect a source of -50-mV pulses, >10 nsec wide, to the

463 Input. Set the mode switch at Scint/SB and adjust the

Disc Level control to 5 minor divisions for 50 mV. Observe

the Pos output of the 463 with an oscilloscope and adjust

R77 on the bottom of the 463 for half-firing.

Readjust the input signal to -1 V and adjust the Disc Level

control to again obtain half-firing. The Disc Level control

should be set at 1 major division +10 minor divisions. If the

Disc Level control is not within 10 minor divisions, re

adjust R77 and repeat the procedure.

6.3. NEGATIVE OUTPUT PULSE SHAPE AND

AMPLITUDE ADJUSTMENT

Set the 463 for Its Scint/SB mode with the Disc Level

control at 5 minor divisions. Connect a -TV pulse to the

463 Input. Observe the Neg output nearer the top of the

front panel with an oscilloscope that is capable of <3-nsec

rise time. Adjust R81 (nearer the top on the printed circuit

board) for minimum signal width and maximum amplitude.