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DG NVMe-IP にも：インストラクション (18 ページ)

dg_nvmeip_instruction_en.doc

This document describes the instruction to run NVMe-IP demo on FPGA development board by

using AB16-PCIeXOVR board. The demo is designed to write/verify data with NVMe PCIe SSD.

User can control test operation through Serial console.

1 Environment Requirement

To demo NVMe-IP on FPGA development board, please prepare following hardware/

software.

1) Supported FPGA Development board: KC705/VC707/VC709/ZC706/KCU105/ZCU106/

Zynq Mini-ITX (7Z045 model)

2) PC with Xilinx programmer software (iMPACT/Vivado) and Serial console software

3) AB16-PCIeXOVR board + power adapter cable from AB16 delivery set

Note: Zynq Mini-ITX has built-in PCIe Female connector, so the adapter board is not

required.

4) Xilinx Power adapter for Xilinx board or ATX power supply for Zynq Mini-ITX board

5) NVMe PCIe SSD connecting to PCIe Female connector on AB16/Mini-ITX board

6) micro USB cable for programming FPGA between FPGA board and PC

7) mini/micro USB cable for Serial console, connecting between FPGA board and PC

Figure 1-1 NVMe-IP Demo Environment Setup on KC705 (PCIe Gen2)

30-Nov-17

NVMe-IP Demo Instruction

Rev2.1 30-Nov-17

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