- ページ 4
メディア・コンバーター Chrontel CH7034BのPDF アプリケーションノートをオンラインで閲覧またはダウンロードできます。Chrontel CH7034B 18 ページ。 Hdtv/vga/lvds encoder
ページを印刷するCHRONTEL
This pin sets the DAC current. A 1.2K ohm, 1% tolerance resistor should be connected between this pin and
AGND_DAC as shown in Figure 4. This resistor should be placed with short and wide traces as near as possible to
CH7034B.
2.3
General Control Pins
• RESETB
This pin is the chip reset pin for CH7034B QFN. RESETB pin, which is internally pulled-up, places the device in
the power on reset condition when this pin is low. A power reset switch can be placed on the RESETB pin on the
PCB as a hardware reset for CH7034B QFN or connect to the system's global reset as shown in Figure 5. When the
pin is high, the reset function can also be controlled through the serial port.
U1
On board reset
U2
Global reset
• XI/FIN and XO
CH7034B has capability to accept external
4
U1
80
ISET
CH7034
QFN
79
AGND _D AC
Figure 4: ISET pin connection
7
ResetB
RESETB
AVDD
7
ResetB
RESETB
Figure 5: RESETB pin connection
with frequencies from 2.3 MHz to 64 MHz.
crystal
R16
1.2K( 1%)
AVDD
R1
SW1
1M
P8058SS-ND
C1
0.1uF
R2
1M
Global Reset
C2
0.1uF
206-1000-013
AN-B013
Rev1.4,
06/30/2020