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ページを印刷するAtlys Reference Manual
Power
The power application provides highly accurate
(better than 1%) real-time current and power
readings from four on-board power-supply
monitors. The monitors are based on Linear
Technology's LTC2481C sigma-delta analog to
digital converters that return 16-bit samples for
each channel.
Real-time current and power data is displayed
in tabular form and updated continuously when
the power meter is active (or started).
Historical data is available using the Show
Graph feature – up to 10 minutes of measured
current data can be displayed for all four power
supplies. Recorded values are also stored in a
buffer that can be saved to a file for later
analysis. The Save Buffer and Clear Buffer are
used to save and clear the historical data in the
buffer.
Register I/O
The register I/O tab requires that a
corresponding IP block, available in a
reference design on the Digilent website, is
included and active in the FPGA. This IP block
provides an EPP-style interface, where an 8-bit
address selects a register, and data read and
write buttons transfer data to and from the
selected address. Addresses entered into the
address field must match the physical address
included in the FPGA IP block.
Register I/O provides an easy way to move
small amounts of data into and out of specific
registers in a given design. This feature greatly
simplifies passing control parameters into a
design, or reading low-frequency status
information out of a design.
Doc: 502-178
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