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2-2
The LDMOS PA is capable of supplying an output power of 8W with an input signal of 0.3W. The
current drain is typically 2000 mA while operating in the frequency range of 29.7 - 50 MHz. The final
stage gate is bias by a voltage from PCIC pin 24. This voltage is the output of a programmable DAC
inside the PCIC and the output is adjustable with the radio tuner.
2.2
Antenna Switch
The antenna switch circuit consists of two pin diodes (D100 and D101), a RF network (C147 and
L103), and a DC feed network (L104, C144 and current limiting resistor R101). In the transmit
mode, PCIC (U102) pin 32 goes high supplying current via the feed network to bias the diodes "on".
The shunt diode (D101) shorts out the receiver port and L103 is connected from the RF path to
ground. L103 and the input capacitance of the lowpass filter form a parallel resonant circuit,
effectively disconnecting the receiver port from the antenna while not loading the transmit path. In
the receive mode, pin 32 goes low and the diodes are off. D100 looks like a high impedance
disconnecting the transmitter from the antenna while L103 and C147 form a series resonant circuit
to connect the receiver to the antenna.
2.3
Harmonic Filter
The harmonic filter consists of components C103, C106, C107, C110, C111, C114, C115 and
inductors L100, L101 and L102, which are a part of the SH100 assembly. The harmonic filter for
lowband is pole zero design which gives greater attenuation in low frequencies where the harmonic
energy of the transmitter is the greatest and less attenuation in high frequencies where there is less
harmonic energy. The harmonic filter insertion loss is typically less than 0.8 dB.
2.4
Antenna Matching Network
The antenna matching network (T100) matches the antenna impedance with the harmonic filter to
optimize the performance of the transmitter and receiver.
2.5
Power Control Integrated Circuit (PCIC)
The transmitter uses the PCIC (U102) to regulate the power output of the radio. To accomplish this,
the voltage across R102 is sensed. This voltage drop is directly proportional to the current drawn in
the final stage of the transmitter. This voltage is compared to a programmable reference inside the
PCIC and the voltage on PCIC pin 4 adjusted. Pin 4 connects to the PA driver IC (U101) pin 1 via
resistor R100 and varies RF output power of the driver. This controls the current drain of the final
stage and sets the output power.
2.6
Temperature Cut Back Circuit
Temperature sensor VR101 and associated components are part of a temperature cut back circuit.
This circuit senses the printed circuit board temperature around the transmitter circuits and outputs
a DC voltage to the PCIC. If the DC voltage produced exceeds the set threshold of the PCIC, the
transmitter output power decreases to reduce the transmitter temperature.
THEORY OF OPERATION