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4-2. Operation Description

The video signal of the odd number pixel (even number

pixel) is sent to Q501 (Q503) base and supplied to pin 16

of Q502 (Q504), LM1201M. The signal is clamped at

pin 16 and the pedestal voltage is adjusted at pin 6 after

the DC level is stabilized and then AC level is adjusted at

pin 3.

The signal is developed from pin 8, supplied to the buffer

circuits of Q505 – Q507 and Q511 – Q513, and supplied

to the inverted circuits of Q508, Q509, Q510, Q523,

Q525 and Q510. These signals are supplied to pins 5, 6,

8, 13, 15 and 16 of 12 phases development IC.

CXA2504N, Q516 and Q517 of sample-and-hold passing

through the SW circuit composed of Q514 and Q515.

The signals are developed from pins 37, 35, 33, 25 and

23 for each input.

The signals at pins 4, 7, 14 are used as bias input and the

bias inputs set the center DC voltage of output equal to

the bias voltage.

Q519 works to suppress the noise occurred at 12 phases

collective input process of the panel.

4-2-2. Basic Component

Pin No.

Name

CLY

VDDY

NRS2

NRS1

LCCOM

VID11

VID9

Table 4-2-1 Terminal description

Pin No.

Name

VID7

VID5

VID3

VID1

VSSX

CLX

VDDX

4-2-1. Outline of Liquid Crystal Panel

The liquid crystal panel module is an active matrix panel

with a built-in driver of multi-crystal silicon. The liquid

crystal panel module is designed for use of color projec-

tors in combination with an enlargement projection

system and dichroic mirror.

(1)

Screen size

(2)

Pixel number

(3)

Applicable to XGA

(4)

Monochrome panel

(5)

Drive system

(6)

Dot clock

(7)

Inverted function for UP/DOWN/LEFT/RIGHT di-

rections

Pin No.

Name

DIRX

ENB2

ENB1

VSSX

VID2

VID4

VID6

VID8

4-3

26.624 (W) x 19.968 (H)

1024 (W) x 768 (H)

H inverted drive

65 MHz

Pin No.

Name

VID10

VID12

LCCOM

N.C.

NRG

DIRY

VSSY