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Pioneer PD-S507 サービスマニュアル

7. GENERAL INFORMATION

7.1 IC
7 PE8001A (IC401: MAIN BOARD ASSY)
7 D/A CONVERTER IC
¶ Pin Arrangement
PE8001A
LRCK
1
DATA
2
BCK
3
CLKO
4
XTI
5
XTO
6
DGNO
7
V
8
DD
V
2R
9
CC
AGND2R
10
EXTR
11
NC
12
V
R
13
OUT
AGND1
14
(Top View)
¶ Pin Function
No.
Name
I/O
1
LRCK
I
LRCK Clock Input (fs)
2
DATA
I
Serial Audio Data Input
3
BCK
I
Data bit clock Input
4
CLKO
O
Buffer output of System clock.
5
XTI
I
Oscillator Input / External clock Input
6
XTO
O
Oscillator Output
7
DGND
–
Digital GND
8
V
–
+5V Digital Power Supply
DD
9
V
2R
–
+5V Analog Power Supply
CC
10 AGND2R
–
Analog GND
11
EXTR
O
Rch, Common Pin of Analog output Amp.
12
NC
–
Not connect
13
V
R
O
Rch, Analog Voltage output of Audio signal
OUT
14
AGND1
–
Analog GND
¶ Block Diagram
28
ML/IIS
27
MC/DM1
26
MD/DM0
25
MUTE
24
MODE
23
CS/IWO
22
RST
21
ZERO
20
V
2L
CC
19
AGND2L
18
EXTL
17
NC
16
V
L
OUT
15
V
1
CC
Description
¶ The information shown in the list is basic information and may not
correspond exactly to that shown in the schematic diagrams.
No.
Name
I/O
15
V
1
–
+5V Analog Power Supply
CC
16
V
L
O
Lch, Common Pin of Analog output Amp.
OUT
17
NC
–
Not connect
18
EXTL
O
Lch, Analog Voltage output of Audio signal
19 AGND2L
–
Analog GND
20
V
2L
–
+5V Analog Power Supply
CC
21
ZERO
O
Zerodata. flag
22
RST
l Reset. "L"at reset DF and modulator
23
CS/IWO
I
Chip select / lnput format. select
24
MODE
I
Mode control select (H: Software, L: Hardware)
25
MUTE
I
Mute control
26 MD/DM0
I
Mode control data / De-emphasis selection
27 MC/DM1
I
Mode control BCK / De-emphasis selection
28
ML/IIS
I
Mode control WDEK / Input format selection
PD-S507
Description
35