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SLG-100S
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3 7 63 1515 0
LSI PIN DESCRIPTION
YSS234 (SP3)
(XN299A00)
PIN
NAME
I/O
NO.
1
MD4
I/O
2
MD3
I/O
3
MD0
I/O
4
MD1
I/O
5
MD2
I/O
6
MCKO
O
7
XO
O
8
XI
I
9
ER0
I
10
ER1
I
11
ER2
I
12
REV0
I
13
REV1
I
14
REV2
I
15
MUTEN
I
16
ICN
I
17
PRG
I
18
MODE
I
19
VSS
-
20
AVSS
-
21
CVA
-
22
AORL
O
23
AORR
O
24
CHL
I
25
AIL
I
TE
26
L 13942296513
VDD
-
27
AIR
I
28
CHR
I
29
AOFL
O
30
AOFR
O
31
AVDD
-
32
CVB
I
IC BLOCK DIAGRAM
NJM3404AM (XM527A00)
Dual Operational Amplifier
MA: IC08-13
PUP2: IC15
+DC Voltage
Output A
1
+V
8
Supply
Inverting
Output B
2
7
Input A
-
+
Non-Inverting
Inverting
3
6
+
-
Input B
Input A
Non-Inverting
Ground
4
-V
5
Input B
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.
10
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(LSI端子機能表)
DSP
(Digital Sound Processor)
FUNCTION
External RAM interface data
Master clock output
Crystal oscillator connection
Crystal oscillator connection
Eary refrection preset select
Effect select
DC D+5V
Initial clear
DC D+5V
Preset mode (H=DC +5V)
Ground
Ground
N.C.
N.C.
N.C.
Sample hold capacitor connection
Lch ADC input
DC D+5V
Rch ADC input
Sample hold capacitor connection
Lch DAC output
Rch DAC output
DC A+5V
Rch midpoint voltage
(ICブロック図)
NJM3414AM (T1) (XR294A00)
Dual Operational Amplifier
MA: IC14
Output A
1
Inverting
2
Input A
-
Non-Inverting
3
Input A
-DC Voltage Supply
4
-V
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2 9
8
PIN
NAME
I/O
NO.
33
AVDD
-
34
VDD
-
35
TST0
-
36
TST1
-
37
DOEN
-
38
SDO1
O
39
SDO0
O
40
WC
O
41
BCO
O
42
MA0
O
43
MA1
O
44
MA2
O
45
MA3
O
46
MA4
O
47
MA5
O
48
MA6
O
49
MA7
O
50
MA12
O
51
MA14
O
52
VSS
-
53
MA10
O
54
MA011
O
55
MA09
O
56
MA8
O
57
MA13
O
Q Q
58
VDD
3
6 7
1 3
-
59
WEN
I
60
OEN
I
61
CEN
I
62
MD7
I/O
63
MD6
I/O
64
MD5
I/O
+DC Voltage
+V
8
Supply
Output B
7
+
Inverting
6
+
-
Input B
Non-Inverting
5
Input B
.
9 4
2 8
MA: IC01
FUNCTION
DC A+5Vs bus
DC D+5V
DC D+5V
DC D+5V
DC D+5V
N.C.
N.C.
N.C.
N.C
External RAM interface address
Ground
External RAM interface address
1 5
DC D+5V
0 5
8
2 9
9 4
Write enable
Output enable
Chip select
External RAM interface data
m
co
9 9
2 8
9 9