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アンプ Yamaha DG-StompのPDF サービスマニュアルをオンラインで閲覧またはダウンロードできます。Yamaha DG-Stomp 43 ページ。 Guitar pre-amplifier with effects
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Yamaha DG-Stomp サービスマニュアル
DG-Stomp
YSS910-S (XV988A00) DSP6 (Digital Signal Processor)
PIN
NAME
I/O
NO.
1
Vdd
Power supply (3.3 V)
2
Vss
Ground
3
XI
I
System master clock input (60 MHz or 30 MHz)
4
XO
O
System master clock output (High or 30 MHz)
5
Vdd
Power supply (5 V)
/SYNCI
I
Sync. signal input
6
7
/SYNCO
O
Sync. signal output
8
Vdd
Power supply (5 V)
9
CKI
I
System clock input (30 MHz)
10
CKO
O
System clock output (30 MHz)
11
CKSEL
I
System master clock select (0: 60 MHz, 1: 30 MHz)
12
Vss
Ground
13
MCKS
I
Serial I/O master clock input (128 x Fs)
14
/SSYNC
I
Serial I/O Sync. signal output
15
/IC
I
Initial clear
16
/TEST
I
Test mode setting (0: Test, 1: Normal)
17
BTYP
I
Data bus type select (0: 8 bit, 1: 16 bit)
18
/IRQ
O
IRQ output
19
TRIG
I/O
Trigger signal input/output
20
Vdd
Power supply (5 V)
Vss
Ground
21
22
/CS
I
chip select signal input
23
/WR
I
Write signal input
24
/RD
I
Read signal input
25
CA7
I/O
26
CA6
I/O
27
CA5
I/O
28
CA4
I/O
Address bus of internal register
29
CA3
I/O
30
CA2
I/O
31
CA1
I/O
32
Vss
Ground
33
Vdd
Power supply (3.3 V)
34
CD15
I/O
35
CD14
I/O
CD13
I/O
36
37
CD12
I/O
38
CD11
I/O
Data bus of internal register
39
CD10
I/O
40
CD09
I/O
41
CD08
I/O
42
CD07
I/O
43
CD06
I/O
44
Vss
Ground
45
Vdd
Power supply (3.3 V)
46
Vdd
Power supply (5 V)
47
CD05
I/O
48
CD04
I/O
49
CD03
I/O
Data bus of internal register
50
CD02
I/O
CD01
I/O
51
52
CD00
I/O
53
/WAIT
O
WAIT output
54
Vss
Ground
55
SI0
I
56
SI1
I
57
SI2
I
58
SI3
I
Serial data input
59
SI4
I
60
SI5
I
61
SI6
I
62
SI7
I
63
Vss
Ground
64
Vdd
Power supply (5 V)
65
SO0
O
SO1
O
66
67
SO2
O
68
SO3
O
Serial data output
69
SO4
O
70
SO5
O
71
SO6
O
72
SO7
O
73
Vss
Ground
74
DB00
I/O
75
DB01
I/O
76
DB02
I/O
77
DB03
I/O
78
DB04
I/O
79
DB05
I/O
80
DB06
I/O
Parallel data bus
DB07
I/O
81
82
DB08
I/O
83
DB09
I/O
84
DB10
I/O
85
DB11
I/O
86
DB12
I/O
87
Vdd
Power supply (5 V)
88
Vdd
Power supply (3.3 V)
16
PIN
FUNCTION
NO.
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
NAME
I/O
89
Vss
Ground
90
DB13
I/O
91
DB14
I/O
92
DB15
I/O
93
DB16
I/O
DB17
I/O
94
Parallel data bus
95
DB18
I/O
96
DB19
I/O
97
DB20
I/O
98
DB21
I/O
99
DB22
I/O
Vss
Ground
Vdd
Power supply (3.3 V)
DB23
I/O
DB24
I/O
DB25
I/O
DB26
I/O
DB27
I/O
Parallel data bus
DB28
I/O
DB29
I/O
DB30
I/O
DB31
I/O
TIMO/DBOB
I/O
Timing signal output/ Parallel data bus output/ input
Vss
Ground
Vdd
Power supply (5 V)
DA00
I/O
DA01
I/O
DA02
I/O
DA03
I/O
Memory data bus
DA04
I/O
DA05
I/O
DA06
I/O
DA07
I/O
Vss
Ground
DA08
I/O
I/O
DA09
DA10
I/O
DA11
I/O
Memory data bus
DA12
I/O
DA13
I/O
DA14
I/O
DA15
I/O
Vss
Ground
Vdd
Power supply (3.3 V)
(n.c)
Not used
Vdd
Power supply (5 V)
DA16
I/O
DA17
I/O
DA18
I/O
DA19
I/O
Memory data bus
I/O
DA20
DA21
I/O
DA22
I/O
DA23
I/O
Vss
Ground
DA24
I/O
DA25
I/O
DA26
I/O
DA27
I/O
Memory data bus
DA28
I/O
DA29
I/O
DA30
I/O
DA31
I/O
Vdd
Power supply (5 V)
Vss
Ground
A00
O
A01
O
A02
O
A03
O
A04
O
Memory address (SRAM, PSRAM, DRAM)
A05
O
A06
O
A07
O
A08
O
A09
O
Vss
Ground
Vdd
Power supply (3.3 V)
A10
O
Memory address (SRAM, PSRAM, DRAM)
A11
O
A12
O
A13
O
Memory address (SRAM, PSRAM)
A14
O
A15/RAS
O
Memory address (SRAM, PSRAM), /RAS (DRAM)
A16/CAS
O
Memory address (SRAM, PSRAM), /CAS (DRAM)
A17/CE
O
Memory address (SRAM), /CE (PSRAM)
/WE
O
Memory write enable signal
/OE
O
Memory output enable signal
Vdd
Power supply (5 V)
DM: IC8, IC9
FUNCTION