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マザーボード AKM AKD4127-AのPDF マニュアルをオンラインで閲覧またはダウンロードできます。AKM AKD4127-A 20 ページ。 Ak4127 evaluation board rev.0
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(2) All clocks are fed through the 10pin port
When using PORT3 (OUTPUT), nothing should be connected to J2 (TX) and PORT4 (DIT).
• SW4 setting (See Table 6)
Upper-side is "H" and lower-side is "L".
SW4 No.
1
2
3
4
5
6
7
Mode
CMODE2 CMODE1
0
L
1
L
2
L
3
L
4
H
5
H
6
H
7
H
<KM085601>
JP6
OBICK
Name
ODIF1
AK4127 Output Audio I/F Format Setting
ODIF0
CMODE2
CMODE1
CMODE0
OBIT1
OBIT0
Table 6. SW4 Setting
Mode
ODIF1
0
L
1
L
2
H
3
H
Table 7. Output Audio Interface Format 1 (Output PORT)
CMODE0
Master / Slave
L
L
L
H
H
L
H
H
L
L
L
H
H
L
H
H
Master (Bypass)
Table 8. Master/Slave Control (Output PORT)
Mode
OBIT1
0
L
1
L
2
H
3
H
Table 9. Output Audio Interface Format 2 (Output PORT)
JP7
OLRCK
ON ("H")
OFF ("L")
Refer to Table 7
AK4127 Mode Setting
Refer to Table 8
AK4127 Output bit Length Setting
Refer to Table 9
ODIF0
SDTO Format
L
LSB justified
H
(Reserved)
L
MSB justified
2
H
I
S Compatible
OMCLK
Master
256fso
Master
384fso
Master
512fso
Master
768fso
Slave
Not used. Set to DVSS.
Master
128fso
Master
192fso
Not used. Set to DVSS.
OBIT0
SDTO Output
L
16bit
H
18bit
L
20bit
H
24bit
- 5 -
[AKD4127-A]
Default
H
L
H
L
L
H
H
fso
8k ∼ 108kHz
8k ∼ 108kHz
8k ∼ 54kHz
8k ∼ 54kHz
8k ∼ 216kHz
8k ∼ 216kHz
8k ∼ 216kHz
8k ∼ 216kHz
2006/11