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コンピュータ・ハードウェア Cypress Semiconductor CY62138FV30のPDF 仕様書をオンラインで閲覧またはダウンロードできます。Cypress Semiconductor CY62138FV30 14 ページ。 2-mbit (256k x 8) static ram mobl
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Pin Configuration
[2]
36-Ball VFBGA
Top View
A
CE
A
1
2
0
IO
WE
A
4
2
NC
IO
5
V
SS
V
CC
NC
IO
6
CE
IO
OE
1
7
A
A
A
10
11
9
A
1
11
2
A
9
A
3
8
4
A
13
5
WE
CE
6
2
TSOP I
7
A
15
Top View
8
V
CC
(not to scale)
A
9
17
A
10
16
A
11
14
A
12
12
A
13
7
A
14
6
15
A
5
16
A
4
Product Portfolio
V
Product
Min
CY62138FV30LL
2.2
Note
2. NC pins are not connected on the die.
3. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
Document #: 001-08029 Rev. *E
A
A
A
A
6
3
8
A
A
IO
B
4
0
7
C
A
IO
5
1
V
D
CC
V
E
SS
F
A
IO
17
2
A
G
A
IO
16
15
3
A
A
A
H
12
13
14
32
OE
31
A
10
30
CE
1
29
IO
7
28
IO
6
27
IO
5
26
IO
4
25
IO
3
24
GND
IO
23
2
22
IO
1
21
IO
0
A
20
0
19
A
1
18
A
2
A
17
3
Range (V)
CC
Speed
(ns)
[3]
Typ
Max
3.0
3.6
45
CY62138FV30 MoBL
32-Pin SOIC/TSOP II
Top View
A
17
1
A
16
2
A
14
3
A
12
4
A
7
5
A
6
6
A
5
7
A
4
8
A
3
9
A
2
10
A
1
11
A
0
12
IO
0
13
IO
1
14
IO
2
15
V
SS
16
A
11
25
A
9
26
A
27
8
26
28
A
13
29
WE
30
CE
2
STSOP
31
A
15
Top View
32
V
CC
(not to scale)
A
1
17
A
2
16
A
3
14
A
4
12
A
5
7
A
6
6
7
A
5
8
A
4
Power Dissipation
Operating I
(mA)
CC
f = 1 MHz
f = f
max
[3]
[3]
Typ
Max
Typ
1.6
2.5
13
CC
V
CC
32
A
31
15
CE
2
30
WE
29
A
28
13
A
8
27
A
26
9
A
25
11
OE
24
A
23
10
CE
22
1
IO
21
7
IO
20
6
IO
19
5
IO
18
4
IO
17
3
24
OE
23
A
10
22
CE
1
21
IO
7
20
IO
6
19
IO
5
18
IO
4
17
IO
3
16
GND
15
IO
2
14
IO
1
13
IO
0
12
A
0
A
11
1
10
A
2
9
A
3
Standby I
(µA)
SB2
[3]
Max
Typ
Max
18
1
5
= V
, T
= 25°C.
CC(typ.)
A
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