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コンピュータ・ハードウェア Cypress Semiconductor CY62148ESLのPDF 仕様書をオンラインで閲覧またはダウンロードできます。Cypress Semiconductor CY62148ESL 11 ページ。 Mobl 4-mbit (512k x 8) static ram
ページを印刷するSwitching Characteristics
[9]
Over the Operating Range
Parameter
Read Cycle
t
Read Cycle Time
RC
t
Address to Data Valid
AA
t
Data Hold from Address Change
OHA
t
CE LOW to Data Valid
ACE
t
OE LOW to Data Valid
DOE
t
OE LOW to Low Z
LZOE
t
OE HIGH to High Z
HZOE
t
CE LOW to Low Z
LZCE
t
CE HIGH to High Z
HZCE
t
CE LOW to Power Up
PU
t
CE HIGH to Power Up
PD
[12]
Write Cycle
t
Write Cycle Time
WC
t
CE LOW to Write End
SCE
t
Address Setup to Write End
AW
t
Address Hold from Write End
HA
t
Address Setup to Write Start
SA
t
WE Pulse Width
PWE
t
Data Setup to Write End
SD
t
Data Hold from Write End
HD
t
WE LOW to High Z
HZWE
t
WE HIGH to Low Z
LZWE
Notes
9. Test conditions for all parameters other than tri-state parameters assume signal transition time of 3 ns or less (1 V/ns), timing reference levels of V
levels of 0 to V
, and output loading of the specified I
CC(typ)
10. At any given temperature and voltage condition, t
11. t
, t
, and t
transitions are measured when the output enter a high impedance state.
HZOE
HZCE
HZWE
12. The internal write time of the memory is defined by the overlap of WE, CE = V
a write by going INACTIVE. The data input setup and hold timing must be referenced to the edge of the signal that terminates the write.
Document #: 001-50045 Rev. **
Description
[10]
[10, 11]
[10]
[10, 11]
[10, 11]
[10]
/I
as shown in
AC Test Loads and Waveforms
OL
OH
is less than t
, t
is less than t
HZCE
LZCE
HZOE
. All signals must be ACTIVE to initiate a write and any of these signals can terminate
IL
CY62148ESL MoBL
55 ns
Min
55
10
5
10
0
55
40
40
0
0
40
25
0
10
on page 4.
, and t
is less than t
for any given device.
LZOE
HZWE
LZWE
®
Unit
Max
ns
55
ns
ns
55
ns
25
ns
ns
20
ns
ns
20
ns
ns
55
ns
ns
ns
ns
ns
ns
ns
ns
ns
20
ns
ns
/2, input pulse
CC(typ)
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