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コンピュータ・ハードウェア Cypress Semiconductor CY7C1306BV25のPDF 仕様書をオンラインで閲覧またはダウンロードできます。Cypress Semiconductor CY7C1306BV25 20 ページ。 Cypress 18-mbit burst of 2 pipelined sram with qdr architecture specification sheet

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Cypress Semiconductor CY7C1306BV25 仕様書
TAP AC Switching Characteristics
Parameter
Output Times
t
TCK Clock LOW to TDO Valid
TDOV
t
TCK Clock LOW to TDO Invalid
TDOX
TAP Timing and Test Conditions
TDO
Z
= 50Ω
0
(a)
GND
Test Clock
TCK
Test Mode Select
TMS
Test Data-In
TDI
Test Data-Out
TDO
Identification Register Definitions
Instruction Field
Revision Number (31:29)
Cypress Device ID (28:12)
Cypress JEDEC ID (11:1)
ID Register Presence (0)
Document #: 38-05627 Rev. *A
Over the Operating Range
Description
[12]
1.25V
50Ω
C
= 20 pF
L
t
TMSS
t
TDIS
Value
CY7C1303BV25
000
01011010010010101
00000110100
1
[11, 12]
(continued)
ALL INPUT PULSES
2.5V
1.25V
0V
t
t
TL
TH
t
TCYC
t
TMSH
t
TDIH
t
t
TDOX
TDOV
CY7C1306BV25
000
Version number.
01011010010100101
Defines the type of SRAM.
00000110100
Allows unique identification of SRAM vendor.
1
Indicate the presence of an ID register.
CY7C1303BV25
CY7C1306BV25
Min.
Max.
Unit
20
ns
0
ns
Description
Page 12 of 19
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