- ページ 9
コンピュータ・ハードウェア Cypress Semiconductor CY7C138のPDF 仕様書をオンラインで閲覧またはダウンロードできます。Cypress Semiconductor CY7C138 18 ページ。 4k x 8/9 dual-port static ram with sem, int, busy
ページを印刷するSwitching Waveforms
A
–A
0
2
SEM
I/O
0
t
SA
R/W
OE
A
–A
0L
2L
R/W
L
SEM
L
A
–A
0R
2R
R/W
R
SEM
R
Notes
25. Data I/O pins enter high impedance when OE is held LOW during write.
26. CE = HIGH for the duration of the above timing (both write and read cycle).
Document #: 38-06037 Rev. *D
(continued)
VALID ADDRESS
t
AW
t
HA
t
SCE
t
SD
DATA
VALID
IN
t
HD
t
PWE
WRITE CYCLE
Figure 9. Timing Diagram of Semaphore Contention
MATCH
t
SPS
MATCH
Figure 10. Timing Diagram of Read with BUSY (M/S = HIGH)
t
AA
VALID ADDRESS
t
ACE
t
SOP
t
t
SWRD
DOE
t
SOP
READ CYCLE
[27, 28, 29]
CY7C138, CY7C139
t
OHA
DATA
VALID
OUT
[21]
Page 9 of 17
[+] Feedback