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Table 1. Pin Descriptions
QFN VFBGA
Name
4
H1
AVCC
8
H5
AVCC
7
H4
AGND
11
H8
AGND
9
H6
DPLUS
10
H7
DMINUS
49
G8
D0
48
G7
D1
46
G5
D2
44
G3
D3
43
G2
D4
41
F8
D5
39
F6
D6
38
F5
D7
37
F4
D8
36
F3
D9
34
F1
D10
33
G4
D11
31
E1
D12
29
D8
D13
27
G1
D14
26
E2
D15
50
A1
CLK
3
B2
Reset
12
B3
XcvrSelect
13
B4
TermSelect
2
B1
Suspend
Note
1. Unused inputs should not be left floating. Tie either HIGH or LOW as appropriate. Outputs that are three-statable should only be pulled up or down to ensure
signals at power-up and in standby.
Document #: 38-08052 Rev. *G
Type
Default
Power
N/A
Analog V
Power
N/A
Analog V
Power
N/A
Analog Ground Connect to ground with as short a path as possible.
Power
N/A
Analog Ground Connect to ground with as short a path as possible.
I/O/Z
Z
USB DPLUS Signal Connect to the USB DPLUS signal.
I/O/Z
Z
USB DMINUS Signal Connect to the USB DMINUS signal.
I/O
Bidirectional Data Bus This bidirectional bus is used as the entire data
bus in the 8-bit bidirectional mode or the least significant eight bits in the
I/O
16-bit mode. Under the 8-bit unidirectional mode, these bits are used as
I/O
inputs for data, selected by the RxValid signal.
I/O
I/O
I/O
I/O
I/O
I/O
Bidirectional Data Bus This bidirectional bus is used as the upper eight
bits of the data bus when in the 16-bit mode, and not used when in the
I/O
8-bit bidirectional mode. Under the 8-bit unidirectional mode these bits
I/O
are used as outputs for data, selected by the TxValid signal.
I/O
I/O
I/O
I/O
I/O
Output
Clock This output is used for clocking the receive and transmit parallel
data on the D[15:0] bus.
Input
N/A
Active HIGH Reset Resets the entire chip. This pin can be tied to V
through a 0.1-μF capacitor and to GND through a 100 K resistor for a
10-ms RC time constant.
Input
N/A
Transceiver Select This signal selects between the Full Speed (FS) and
the High Speed (HS) transceivers:
0: HS transceiver enabled
1: FS transceiver enabled
Input
N/A
Termination Select This signal selects between the Full Speed (FS) and
the High Speed (HS) terminations:
0: HS termination
1: FS termination
Input
N/A
Suspend Places the CY7C68000A in a mode that draws minimal power
from supplies. Shuts down all blocks not necessary for Suspend/Resume
operations. While suspended, TermSelect must always be in FS mode
to ensure that the 1.5 Kohm pull up on DPLUS remains powered.
0: CY7C68000A circuitry drawing suspend current
1: CY7C68000A circuitry drawing normal current
Description
This signal provides power to the analog section of the chip.
CC
This signal provides power to the analog section of the chip.
CC
CY7C68000A
[1]
CC
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