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Thermal Resistance
[8]
Parameter
Description
Θ
Thermal Resistance
JA
(Junction to Ambient)
Θ
Thermal Resistance
JC
(Junction to Case)
AC Test Loads and Waveforms
R1
V
CC
OUTPUT
30 pF
INCLUDING
JIG AND
SCOPE
Parameters
R1
R2
R
TH
V
TH
Data Retention Characteristics
Parameter
Description
V
V
for Data Retention
DR
CC
[7]
I
Data Retention Current
CCDR
[8]
t
Chip Deselect to Data Retention Time
CDR
[9]
t
Operation Recovery Time
R
Data Retention Waveform
V
CC
CE
Notes:
9. Full device AC operation requires linear V
10. CE is the logical combination of CE
Document #: 001-08029 Rev. *E
Test Conditions
Still air, soldered on a 3 x 4.5
inch, two layer printed circuit
board
R2
Rise Time = 1 V/ns
Equivalent to:
THEVENIN
OUTPUT
2.5V (2.2V to 2.7V)
16667
15385
8000
1.20
(Over the Operating Range)
V
= 1.5V,
CC
CE
> V
1
V
> V
IN
[10]
DATA RETENTION MODE
V
CC(min)
t
CDR
> 100 µs or stable at V
ramp from V
to V
CC
DR
CC(min)
and CE
. When CE
is LOW and CE
1
2
1
SOIC
VFBGA
44.53
38.49
24.05
17.66
ALL INPUT PULSES
V
CC
90%
10%
GND
EQUIVALENT
R
TH
V
3.0V (2.7V to 3.6V)
1103
1554
645
1.75
Conditions
− 0.2V or CE
< 0.2V,
CC
2
− 0.2V or V
< 0.2V
CC
IN
V
> 1.5V
DR
> 100 µs.
CC(min)
is HIGH, CE is LOW; when CE
is HIGH or CE
2
1
CY62138FV30 MoBL
TSOP II
STSOP
TSOP I
44.16
59.72
50.19
11.97
15.38
14.59
90%
10%
Fall Time = 1 V/ns
Unit
Ω
Ω
Ω
V
[3]
Min
Typ
Max
1.5
1
4
0
t
RC
V
CC(min)
t
R
is LOW, CE is HIGH.
2
Page 4 of 13
®
Unit
°C/W
°C/W
Unit
V
µA
ns
ns
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