DAQ PCI-FRM01 애플리케이션 매뉴얼 - 페이지 4
{카테고리_이름} DAQ PCI-FRM01에 대한 애플리케이션 매뉴얼을 온라인으로 검색하거나 PDF를 다운로드하세요. DAQ PCI-FRM01 14 페이지. Pci-frm01 register level
페이지 인쇄2. PCI-FRM01 Functional Block Diagram
The address area assigned by the system in the PCI-FRM01 division is shown in the figure below.
Most peripheral control and status register is in the I/O area, only SDR SRAM is in the memory area.
The configuration area can not be used in the most application because of only using resources for the
system boot time.
PCI BUS
PCI-FRM01 of the figure shows the function block, which features the dotted area is reserved for
future feature additions.
PCI-FRM01 INTERNAL BLOCK - FPGA
PCI Target
MEM Decoder
To each IO
Module
IO Decoder
DPRAM
CLOCK syn.
Interrupt
Controller
(0xb0)
INT sources in Chip
From Ext.
2005 DAQ system, all rights reserved.
PCI-FRM01 Register Level Application Guide
Local Bus
Address
Data(Mem,I/O)
BUS Mux
Camera Link(LVDS)
Ext. Address, Data, Control
Application Note
Reserved
(0x00 ? 0x5F)
UART
(0x60)
Reserved
(0x70 ? 0xAF)
Interrupt controller
(0xC0)
DIO
(0xD0)
Reserved
(0xE0 ? 0xFF)
MEM Decoder
http://www.daqsystem.com
(AN241)
Local BUS