Fujitsu MB91360 SERIES 사용자 설명서 - 페이지 7
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Fujitsu MB91360 SERIES에 대해서도 마찬가지입니다: 사용자 설명서 (43 페이지), 사용자 설명서 (17 페이지), 애플리케이션 노트 (35 페이지)
페이지 인쇄
VCC1
VSS
Emulator
system
MB2197-120
Connector
to emulator
Figure 2: Block diagram - Level-Shifter board
1.2 Transceiver direction control signal
The DATA bus (D[31:0]) transceiver direction signal is a hardwired combination of CSx1 and
RDx :
DIR=CSx1 & not(RDx).
The ADDRESS bus (A[20:0], WRx[3:0], CLK, RDx) direction is fixed to EVA
Other control signals (CSx[6:2], CSx0, BREQ, BGRNTx, ALE, AH/BOOT, AS, DREQ, DACK,
DEOP) can be configured by jumpers on the level shifter board.
direction of
direction of
ADDRESS bus
DATA bus D[31:0]
A[20:0], CLK,
WRx[3:0], RDx
fixed direction
EVA TARGET
(B A)
EVA
TARGET
1
(B
A)
EVA
(B
1
pin names of transceiver 74ALVC164245
© Fujitsu Microelectronics Europe GmbH
LEVELSHIFTER BOARD
Chapter 1 Features
5V
3V
5V
3V
D0-D31
D0-D31
A0-A20
A0-A20
CS0..6 /RD/
CS0..6 /RD/W R0123/
W R0123/DMA
DMA
A0-A17
Decoder
CS0..6 /RD/
W R0123
DIR
signal on level
shifter board
1
TARGET
1
A)
- 7 -
5V
Regulator
GND
5V
3V
5V ext.
D0-D31
SRAM
Connector
1024kB
to target
D0-D15
RD/W R
CE
D16-D31
U/L
VGC Level Shifter Board
CSx1
RDx
from
from
EVA
EVA
board
board
1
1
0
else
Probe cable
MB2197-127
target system
TARGET.
0
UG-910005-24