Dell PowerEdge C6105 기술 매뉴얼 - 페이지 14
{카테고리_이름} Dell PowerEdge C6105에 대한 기술 매뉴얼을 온라인으로 검색하거나 PDF를 다운로드하세요. Dell PowerEdge C6105 36 페이지. Rack server
Dell PowerEdge C6105에 대해서도 마찬가지입니다: 매뉴얼 사용 (46 페이지), 포트폴리오 매뉴얼 (27 페이지)
Feature
Link Width
PowerCap
AMD CoolSpeed
Technology
C1E
LV-DDR3
support
Ultra-low power
platform
Up to DDR3-
1333 (1.333GHz)
memory support
HyperTransport
technology HT
Assist
HyperTransport
Direct Connect
3.0 technology
Architecture
(HT3)
2.0
Cache and core
count
14
Dell PowerEdge C6105 Rack Server Technical Guide
Function
Power efficiency
capability (manually
enabled thru BIOS) that
changes all 16-bit links to
8-bit links
Reduces p-states when a
temperature limit is
reached
An active sleep state
invoked when all
processor cores are idle
Lower memory voltage of
1.35V versus standard
voltage memory of 1.5V
Specialized ultra-low
power platforms are
great for cloud/dense
environments
Provides higher peak
throughput than earlier
memory technologies
Helps increase coherent
memory bandwidth and
reduce latency in
multi-node systems by
reducing cache probe
traffic between cores
Provides superior system
bandwidth between
processors and I/O,
increasing interconnect
rate from 2GT/s with HT1
in previous generations
up to a maximum
6.4GT/s with HT3
Choice of 4- or 6-core
processors, with each
core having its own L1
and L2 caches, and a
shared 6MB L3 cache
Benefits
Helps improve performance-per-watt
Server can continue to operate if
processor's thermal environment
exceeds safe operational limits
Offers platform providers the ability to
safely reduce system fan speeds,
which helps deliver greater platform
efficiency
Delivers additional power savings (up to
10W for 2-processor servers) depending
on system configuration, such as when
the Northbridge and HyperTransport
technology links are powered down and
cores are at idle
Helps reduce overall memory power
consumption
Cooperative designs for specialized and
ultra-low power platform provide power
efficiency beyond just the processor
Enables improved overall system
performance and investment protection
compared to earlier technologies
Reduces the amount of cache probe bus
traffic, enhancing a server's efficiency and
scalability
Helps improves overall system balance
and scalability
Infrastructure designed to accommodate
either single- or dual-socket servers
providing server scalability from 4 cores
to 12 cores per server platform