Dell PowerEdge M910 기술 매뉴얼 - 페이지 9

{카테고리_이름} Dell PowerEdge M910에 대한 기술 매뉴얼을 온라인으로 검색하거나 PDF를 다운로드하세요. Dell PowerEdge M910 45 페이지. M-series blade servers
Dell PowerEdge M910에 대해서도 마찬가지입니다: 업데이트 매뉴얼 (44 페이지), 업데이트 매뉴얼 (21 페이지), 업데이트 매뉴얼 (14 페이지), 설치 매뉴얼 (7 페이지), 업데이트 매뉴얼 (28 페이지), 시작하기 매뉴얼 (12 페이지), 시작하기 매뉴얼 (12 페이지), 기술 매뉴얼 (46 페이지), 포트폴리오 매뉴얼 (27 페이지), 시작하기 매뉴얼 (14 페이지), 시작하기 매뉴얼 (12 페이지), 기술 매뉴얼 (49 페이지)

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2 Key technologies

The PowerEdge M910 implements a number of key technologies:



Intel Xeon processor E7-2800, E7-4800 and E7-8800 product families



Intel 7510 chipset



FlexMem Bridge



I/O Hub (IOH) with Intel QuickPath Architecture



DDR3 memory



PCI Express

(PCIe) 2.0



Optional Redundant SD media for embedded hypervisor



Integrated Dell Remote Access Controller 6 (iDRAC6) Express

Intel 7510 chipset

The 7510 chipset is designed to support Intel Xeon processor E7-2800, E7-4800 and E7-8800

product families, Intel Xeon processor 6500 and 7500 series 4S family, Intel QuickPath Interconnect

(QPI), DDR3 memory technology and PCIe 2.0.

Intel processors

Key features of the Intel Xeon processor E7-2800, E7-4800 and E7-8800 product families include:



Up to ten cores per processor



Up to 30MB shared L3 cache



32nm process technology



Intel Trusted Execution Technology (TXT) and AESNI (AES New Instructions)



RAS DDDC (Double Device Data Correct)



Intel HyperThreading (2 threads/core)

Key features of the Intel Xeon processor 6500 and 7500 series include:



Up to eight cores per processor



Four full-width, bidirectional point-to-point Intel QuickPath Interconnect (QPI) links at 6.4GT/s



Four Intel Scalable Memory Interconnects (SMI) at 6.4 GT/s



Socket: LS, LGA 1567 package



No termination required for non-populated processors (must populate processor socket one

first)



64-byte cache line size



RISC/CISC hybrid architecture



Compatible with existing x86 code base



Optimized for 32-bit code



MMX™ support



Execute Disable Bit



Intel Wide Dynamic Execution (Executes up to four instructions per clock cycle)



Simultaneous Multi-Threading (SMT) capability (2 threads/core)

PowerEdge M910 Technical Guide