Sony STR-DA333ES - Fm Stereo/fm-am Receiver 기술적 배경 - 페이지 27
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Under ideal conditions, the SHARC DSP's dual core processing can
double the operating speed.
Unfortunately, most applications cannot take advantage of the full power
of this dual core design. The issue is in the "compiler." Think of the DSP as a
special-purpose computer. In order for the computer to perform meaningful task,
software programs must first be loaded into the compiler. Using the C
programming language and a conventional C compiler means sacrificing much of
the performance advantage of the second processing core.
Thanks to our long experience programming DSPs, Sony engineers were
able to develop the "CB compiling" technique. This dramatically reduces wasted
coding efficiency and assures that both calculation cores are working effectively.
The resulting system has 30% higher coding efficiency than conventional C
compiling.
The STR-DA7100ES converts all analog audio inputs into digital, using a
proprietary Sony A/DSD converter, the CXD9856. The device integrates A/DSD
conversion and a decimation filter, and makes it possible to change the operation
mode based on the signal type and subsequent DSP processing.
Sony converts analog sources to digital with our own CXD9856.
ES Receivers v1.0
A/DSD Conversion
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