Motorola GM340 서비스 정보 - 페이지 13

{카테고리_이름} Motorola GM340에 대한 서비스 정보을 온라인으로 검색하거나 PDF를 다운로드하세요. Motorola GM340 34 페이지. Gm series professional radio uhf (403-470mhz)
Motorola GM340에 대해서도 마찬가지입니다: 사용자 설명서 (32 페이지), 서비스 정보 (32 페이지), 서비스 정보 (32 페이지)

페이지 인쇄

VHF (136-174MHz) Transmitter Power Amplifier (PA) 25 W

low IF signal is ampliﬁed and ﬁltered by an external pair of 455 kHz ceramic ﬁlters FL3112, FL3114

for 20/25 kHz channel spacing or FL3111, FL3113/F3115 for 12.5 kHz channel spacing. These pairs

are selectable via BWSELECT. The ﬁltered output from the ceramic ﬁlters is applied to the limiter

input pin of the IF IC (pin 14).

The IF IC contains a quadrature detector using a ceramic phase-shift element (Y3102) to provide

audio detection. Internal ampliﬁcation provides an audio output level of 120 mV rms (at 60%

deviation) from U3101 pin 8 (DISCAUDIO) which is fed to the ASFIC_CMP (U0221) pin 2 (part of

the Controller circuitry).

A received signal strength indicator (RSSI) signal is available at U3101 pin 5, having a dynamic

range of 70 dB. The RSSI signal is interpreted by the microprocessor (U0101 pin 63) and in addition

is available at accessory connector J0501-15.

3.0

VHF (136-174MHz) Transmitter Power Ampliﬁer (PA) 25 W

The radio's 25 W PA is a three stage ampliﬁer used to amplify the output from the VCOBIC to the

radio transmit level. All three stages utilize LDMOS technology. The gain of the ﬁrst stage (U3401)

and the second stage (Q3421) is adjustable, controlled by pin 4 of PCIC (U3501) via U3402-1 and

U3402-2. It is followed by an LDMOS ﬁnal stage (Q3441).

From VCO

Controlled

Stage

To Microprocessor

Devices U3401, Q3421 and Q3441 are surface mounted. A pressure pad between board and the

radio's cover provides good thermal contact between the devices and the chassis.

3.1

First Power Controlled Stage

The ﬁrst stage (U3401) is a 20dB gain integrated circuit containing two LDMOS FET ampliﬁer

stages. It ampliﬁes the RF signal from the VCO (TXINJ). The output power of stage U3401 is

controlled by a DC voltage applied to pin 1 from the op-amp U3402-1, pin 1. The control voltage

simultaneously varies the bias of two FET stages within U3401. This biasing point determines the

overall gain of U3401 and therefore its output drive level to Q3421, which in turn controls the output

power of the PA.

PA-Final

Driver

Stage

Bias 2

A S F I C _ C M P

SPI BUS

Controlvoltage

Figure 2-1 VHF Transmitter Block Diagram

Pin Diode

Antenna

Switch

Power

Sense

PWR

SET

P C I C

Antenna

Harmonic

Filter

RF Jack

Temperature

Sense

To Microprocessor

2-3