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Motorola GP series 서비스 정보

Frequency Generation Circuit

4.0
Frequency Generation Circuit
(Refer to Figure 2-3, the Synthesizer and Voltage controlled Oscillator schematic diagrams)
The frequency generation circuit is composed of Low Voltage Fractional-N synthesizer U205 and
discrete RX VCO, TX VCO and buffers as well other supporting circuitry. The synthesizer block
diagram illustrates the interconnect and support circuitry used in the region. Refer to the schematic
for the reference designators.
The synthesizer is powered by regulated 5V and 3.3V. The 5 volt signal to the synthesizer as well as
the rest of the radio is provided by U204. The 3.3 v signal is provided from U200 in the controller.
The 5V signal goes to pins 13 and 30 while the 3.3V signal goes to pins 5, 20, 34 and 36 of U201.
The synthesizer in turn generates a superfiltered 4.3V which powers the VCOs and buffers.
In addition to the VCO, the synthesizer also interfaces with the logic and ASFIC circuitry.
Programming for the synthesizer is accomplished through the data, clock and chip select lines (pins
7, 8 and 9) from the microprocessor, U409. A 3.3V dc signal from pin 4 indicates to the
microprocessor that the synthesizer is locked.
Transmit modulation from the ASFIC is supplied to pin 10 of U205. Internally the audio is digitized by
the Fractional-N and applied to the loop divider to provide the low-port modulation. The audio runs
through an internal attenuator for modulation balancing purposes before going out at pin 41 to the
VCO.
Voltage
VCP
Multiplier
Vmult2
Synthesizer
Vmult1
U205
17.0 MHz
Ref. Osc.
Modulating
Signal
VSF
Switching
Network
Aux2
Aux3
Loop
Filter
MOD Out
Prescalar input
Figure 2-3 Lowband Frequency Generation Unit Block Diagram
RX VCO
Buffer
TX VCO
Amplifier
2-5
To
Mixer
To PA
Driver