Epson SED1530 Series 기술 매뉴얼 - 페이지 16
{카테고리_이름} Epson SED1530 Series에 대한 기술 매뉴얼을 온라인으로 검색하거나 PDF를 다운로드하세요. Epson SED1530 Series 40 페이지. Lcd driver with ram
페이지 인쇄
(3) LCD Drive Circuit Signals
Name
CL
Input. Effective for an external clock operation model only.
This is a display data latch signal to count up the line counter and common counter
at each signal falling and rising edges. If the system has a built-in oscillator, this is
used as an output pin of the oscillator amp and an Rf oscillator resistor is con-
nected to it.
FR
Input/output.
This is an I/P pin of LCD AC signals, and connected to the M terminal of common
driver.
I/O selection
• Common oscillator built-in model: Output if M/S is 1;
• Dedicate segment model:
SEGn
Output.
The output pin for LCD column (segment) driving. A single level of V
V
5
COMn
Output.
The output pin for LCD common (low) driving. A single level of V
is selected by the combination of common counter output and RF signal. The
slave LSI has the reverse common output scan sequence than the master LSI.
M/S
Input.
The master or slave LSI operation select pin for the SED1520 or SED1522.
Connected to V
slave LSI operation mode).
When this M/S pin is set, the functions of FR, COM0 to COM15, OSC1 (CS), and
OSC2 (CL) pins are changed.
* The slave driver has the reverse common output scan sequence than the master
is selected by the combination of display RAM contents and RF signal.
FR signal
Data
Output level
FR signal
Counter output
Output level
(to select the master LSI operation mode) or V
DD
M/S
SED1520F
V
0A
DD
V
SS
SED1522F
V
0A
DD
V
SS
driver.
EPSON
Description
Input if M/S is 0.
Input
1
1
0
1
V
V2
V5
DD
1
1
0
1
V5
V1
V
DD
FR
COM output
Output
COM0 to COM15
Input
COM31 to COM16
Output
COM0 to COM7
Input
COM15 to COM8
SED1520 Series
, V
, V
DD
2
3
0
0
V3
, V
, V
and V
DD
1
4
0
0
V4
(to select the
SS
OSC1
OSC2
Input
Output
NC
Input
Input
Output
NC
Input
and
5
2–7