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Description

Transorb Voltage Suppressor 430V 1250A ZNR

Fuse 2A Slow Blow 250VAC

2.6

PLC Device Interface

This section describes the circuitry that is directly connected to the Cypress PLC device (U1) and not part of the

transmitter and receiver circuitry described above. In the schematic shown in

shown that are not required for the final system, but are useful for status indication and debugging. The BOM for this

circuit is shown in

The 32.768 kHz crystal (Y2) is required for PLC communication because it is used for the precise timing of the

network protocol and if selected, is also used for the timing of the FSK modulator and demodulator. On the other

hand, the 24.00 MHz oscillator (Y1) is not required in most designs. It is provided as an optional clock source for

timing the FSK modulator and demodulator because it generates a tighter frequency spectrum, which may help with

designs that are marginal to meeting the FCC or CENELEC conducted emissions requirements. The selection

between the FSK modem source is made by setting the CLKSEL pin ('1' = 32.768 kHz crystal,

'0' = 24.00 MHz oscillator, internal pull-up).

Resistor R2 and capacitor C3 form a low pass filter that is used to filter the received 2400 bps demodulated signal,

which is output on pin RXCOMP+. The filtered signal is then connected to the pin RXCOMP-, where it is further

filtered and then deserialized.

Capacitors C1 and C2 are used for decoupling noise from the power supply. Similarly, C5 provides a cleaner signal

from the crystal to the device, and C6 provides a cleaner internal analog ground reference for the modem.

The I2C interface requires pull-up resistors on the bus. If the external host does not have pull-up resistors, then R6

and R7 should be used. The recommended value for these resistors is 2.4-7.5 k.

The LEDs are optional for PLC status indication (DS2 = receiving, DS3 = transmitting, DS4 = band-in-use detection)

and power indication (DS5). The resistors (R1, R3, R4, R5) associated with these LEDs are for current limiting.

The DIP switch bank S1 is optional for setting the device's PLC address and I2C address, as well as selecting the

modem's clock source.

Push-button S2 with current-limiting resistor R8 is optional and is used to easily reset the device to the default state,

instead of disconnecting and reconnecting power.

www.cypress.com

Figure 6. Cypress High Voltage PLC Board AC Line Input Protection Circuit

Table 3. Cypress High Voltage PLC Board AC Line Input Protection BOM

Designator

Table

4. It separates the required components from the optional components.

Document No. 001-55427 Rev. *E

Cypress Powerline Communication Board Design Analysis

Qty.

Value

Manufacturer

Manufacturer Part#

430 V

Panasonic

ERZ-V07D431

2.0 A

Bel Fuse

RST 2

Vendor

VPN

Digikey

P7251-ND

Digikey

507-1179-ND

Figure

7, there are many components