Cypress CY3274 애플리케이션 노트 - 페이지 15

{카테고리_이름} Cypress CY3274에 대한 애플리케이션 노트을 온라인으로 검색하거나 PDF를 다운로드하세요. Cypress CY3274 19 페이지. Powerline communication board design analysis
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Description
Capacitor Electrolytic 100uF 10V Aluminum Radial
Capacitor Electrolytic 220uF 50V
Diode Transorb 33V 600W BI-DIR SMB
Diode Ultrafast 100V 1A
Inductor Power Unshielded 470uH SMD
Resistor 715 OHM 1/10W 1% 0603 SMD
Resistor 240 OHM 1/10W 1% 0603 SMD
Resistor 10 Ohm 1W 5% Metal Oxide
Voltage Regulator 5 Volt
3.5

PLC Device Interface

This section describes the circuitry directly connected to the Cypress PLC device (U2) and not part of the transmitter
and receiver circuitry described above. In the schematic shown in
are not required for the final system. However, they are useful for status indication and debugging. The BOM for this
circuit is shown in
components are the same as for the high voltage board, except that the component numbering is different.
The 32.768 kHz crystal (Y1) is required for PLC communication because it is used for the precise timing of the
network protocol and if selected, is also used for the timing of the FSK modulator and demodulator. On the other
hand, the 24.00 MHz oscillator (Y2) is not required in most designs. It is provided as an optional clock source for
timing the FSK modulator and demodulator because it generates a tighter frequency spectrum, which may help with
designs that are marginal to meeting the FCC or CENELEC conducted emissions requirements. The selection
between the FSK modem source is made by setting the CLKSEL pin ('1' = 32.768 kHz crystal,
'0' = 24.00 MHz oscillator, internal pull-up).
Resistor R9 and capacitor C6 form a low pass filter that is used to filter the received 2400 bps demodulated signal,
which is output on pin RXCOMP+. The filtered signal is then connected to the pin RXCOMP-, where it is furthered
filtered and then deserialized.
Capacitors C11, C22, C26, and C39 are used for decoupling noise from the power supply. Similarly, C7 provides a
cleaner signal from the crystal to the device, and C18 provides a cleaner internal analog ground reference for the
modem.
The I2C interface requires pull-up resistors on the bus. If the external host does not have pull-up resistors, then R35
and R36 should be used. The recommended value for these resistors is 2.4-7.5 k.
The LEDs are optional for PLC status indication (DS2 = receiving, DS3 = transmitting, DS4 = band-in-use detection).
The resistors (R15, R16, and R49) associated with these LEDs are for current limiting.
The DIP switch bank S2 is optional for setting the device's PLC address and I2C address, as well as selecting the
modem's clock source. Push-button S1 with current-limiting resistor R2 is optional and is used to easily reset the
device to the default state, instead of disconnecting and reconnecting power.
www.cypress.com
Table 6. Power Supply BOM for Low Voltage PLC Board
Designator
C24
C25
D9
D10
L4
R45
R46
R54
U7
Table
7. It separates the required components from the optional components. Note that the key
Document No. 001-55427 Rev. *E
Cypress Powerline Communication Board Design Analysis
Qty.
Value
Manufacturer
1
100 µF
PANASONIC
1
220 µF
PANASONIC
1
Littelfuse
1
ES1B
Diodes Inc.
1
470 uH
Pulse
1
715
Rohm
1
240
Rohm
1
10, 1 W
Stackpole
1
LM317MDT
ST Micro
Figure
10, there are many components shown that
MFGPN
Vendor
ECA-1AM101
Digikey
P5123-ND
ECA-1HM221
Digikey
P5183-ND
SMBJ33CA
Digikey
SMBJ33CALFCT-ND
ES1B
Digikey
ES1B-FDICT-ND
P0752.474NLT
Digikey
553-1071-1-ND
MCR03EZPFX7150
Digikey
RHM715HCT-ND
MCR03EZPFX2400
Digikey
RHM240HCT-ND
RSMF 1 10 5% R
Digikey
RSMF110JRCT-ND
LM317MDT-TR
Digikey
497-1574-1-ND
VPN
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