Cypress CY3650 사용자 설명서 - 페이지 9

{카테고리_이름} Cypress CY3650에 대한 사용자 설명서을 온라인으로 검색하거나 PDF를 다운로드하세요. Cypress CY3650 15 페이지. Usb development system

The required communication settings for the PC are:

It is also recommended that the UART FIFO size settings be set to the minimum values. In Windows 95 the follow-

ing steps will change the FIFO settings:

•

On the desk-top, double click on the " My Computer" Icon and then double click on the " Control Panel" Icon. Alter-

nately, use the "start" menu and choose " Settings" and then " Control Panel".

•

In the " Control Panel" window, double click on the " System" Icon.

•

In the " System" window click on the " Device Manager" tab. Then scroll down through the list of devices to the serial

port used for the USB Development Board, this is usually COM1 or COM2. Select the appropriate device by double

clicking.

•

This brings up a serial device window, inside you will see tabs, select the " Advanced" tab. This sub-widow contain the

settings for the serial transmit and receive FIFOs. Set the receive FIFO to 1 and set the transmit FIFO to 3 if this is a

valid setting, otherwise set the FIFO size to 1.

3.5. Switch Settings

Two 8-position DIP switches provide configuration options for the two on-board FPGAs. Table 1 and Table 2 list

options for switches S1 and S3 respectively. Further information on these options is given in Section 5. Unused

switches should be left in the default setting, as these may support internal test modes.

Position

CY3650 USB Development System User's Guide

Baud Rate

Data Bits

Parity

Stop Bits

Flow Control

Table 1: Switch S1 Configuration

Open (1)

Enable

Default

19200

None

None used

Closed (0)

Disable

–

– 4 –

Function

USB Bus Reset

Watch Dog Reset

Cext (wake up)

IO Port Input Only Mode

Suspend on Power On Reset

Required

Ver 2.4